State Machine C ++ Parsing

I. state machine description

The initial development of state machine theory was in the field of digital circuit design. In digital circuits, the state machine can be divided into mealy and Moore state machines based on whether the output is related to the input signal. Based on whether the output is synchronized with the input signal, state machines can be divided into asynchronous and synchronous state machines. In the field of software design, the theory of state machine design has become one of its own. The output of the Moore state machine is only related to the current state and has nothing to do with the input. If this type of state machine is designed in the field of software design, the events accepted by the state machine are all events without internal information (input ). The input of the mealy state machine is jointly determined by the current state and input, which correspond to the software design field. The events received by the state machine contain internal information and affect the output of the state machine. Obviously, this division is meaningless in the field of software design. Although the state machines in the software design field are divided synchronously and asynchronously, they are different from those in digital circuits.

In addition to digital circuits, the course involving state machines is compilation principles (I am a computer major, and it is unclear whether other majors involve state machines ). Next, let's briefly review the description of finite state machines in compilation principles. In the compilation principles course, the description of the finite state machine is limited to the compilation field and the specific status. It changes the status of the input characters without any additional behavior, in addition, the finite state machine component in the compilation principle also contains a unique initial state and a final state set. Mathematical language description: a finite state machine M is a quintuple, M = (k, E, T, S, Z ). Where (1) K is a rich set, each element is called State (2) E is a rich alphabet, and each element of it is called an input character (3) T is a conversion function, is the ing (4) s on k x e-> K is the element in K, is the only first state (5) Z is a subset of K, it is an ending state set or an ending set. Obviously, the explanation of the state machine in the compilation principle has been made special. The input is positioned as a character set, and no additional action occurs when the state changes.

Unlike the state machine in the compilation principle, the input of state machines in the software design field is not a character set, but a structure called an event (it can be a struct or a class object ), in addition, for an event in a specific State, not only the status changes, but also the action. Drawing on the initial and final state states of the state machine in the compilation principle, the mathematical language of the general state machine is described as follows: a general finite state machine M is a triplet, M = {k, E, T, m, F, S, z }. Among them, (1) K is a rich set, and each element is called State (2) E is a rich set, and each element of it is called an event (3) T is a conversion function, K ing on K × E-> K (4) M is a finite set, and each element of it is called Action (5) F is an action ing function, ing (6) s on K × E-> m is the element in K and is the only first state (7) Z is a subset of K and is an final state set, or end set. The practical state machine can be further optimized. First, we can integrate (3) (5) into a ing of K × E-> {k, m, secondly, from the practical point of view, it is used to make up for disabling the status to receive null events (when there is no input, the status changes). This increases the entry and exit actions for each status. Third, in view of the importance of the timer in the system, especially in the state machine, you can add a timer for each State and convert the status after timeout. As described later in this article, the timer is not made special for the time being. If necessary, you can initialize the timer in the status entry action (also: About the timer, in the future, I will write "system design timer").

Ii. State Machine Classification (unless otherwise stated in this article, state machines refer to general finite state machines in the software design field)

Based on whether there is a inclusion relationship between States, there are two types:

(1) conventional state machine. All States in the state machine are mutually exclusive.

(2) hierarchical state machine. States in a state machine are either mutually exclusive or actually contained. You can use a tree structure to describe these State sets. states that contain other states are called branch nodes, A State that does not contain other States is called a leaf node. To facilitate the description of a single tree, a State that contains all state nodes is always designed, which is called a root node. The state machine can only stay on the leaf node, but not on the branch node. Each branch node must specify a subnode as its default subnode, so that the state machine can stay on the leaf node when it enters the branch node.

Iii. State Machine implementation

(1) switch/case if/else implementation. When using a small number of States (three or less), you do not need to introduce a dedicated state machine module. This method cannot write a general state machine module.

(2) process-oriented approach: Macro is a general approach to process-oriented approach. Although the state machine layer can still be encapsulated in an object-oriented way, it is also called a process-oriented method here.
1. Implement the conventional state machine module. This state machine involves the mechanism from top to bottom:

• The top-level structure is the state machine: current status ID, default operation, status table,
• Status table: Status Array
• Status structure: Status ID, status name, entering operation, exiting operation, default operation, status event table (array)
• Status event structure: operation, event, ID of the next status

The algorithm of the state machine is determined by the structure of the state machine. The implementation is as follows: