General makefile and parsing of C + + under Linux

In this paper, the realization of the universal makefile is given, and the key points are analyzed. The so-called C + + Universal Makefile, you can compile links to all C + + programs, and only a few changes.

Known as omnipotent makefile, Unified Lake. I made some changes to the original makefile. First to uncover its truth:

##################################################### Generic Makefile-Magnum makefile# for compiling and linking C + + Projects on Linux # author:george Foot Modified:jackie lee####################################################### customising## Adjust the following if necessary; Executable is the target# executable ' s filename, and LIBS are a list of libraries to link in# (e.g. Alleg, STDCX, Iostr, et c). You can override these on "s# command line of course" if you prefer to does it that way.# #EXECUTABLE: = Main    # executable filename libdir:=              # Static Library directory libs: =           & nbsp   # Static library filename includes:=.           # header file directory srcdir:=              # In addition to the current directory, other source code files directory # # # now alter any implicit rules ' variables if your like, e.g.:cc:=g++cflags: =-g-wall-o3cppflags: = $ (CFLAGS) Cppflags + = $ (addprefix-i,$ (includes)) Cppflags + =-mmd## # The next bit checks to see WHEther RM is in your DJGPP bin# # directory; If not it uses Del instead, but this can cause (harmless) # # ' File not found ' error messages. If you were not using DOS on all,# # set the variable to something which would unquestioningly remove# # files. #RM-F: RM- F # # shouldn ' t need to change anything below this point. #SRCS: = $ (wildcard *.cpp) $ (wildcard $ (Addsuffix/*.cpp, $ (SR Cdir)) Objs: = $ (Patsubst%.cpp,%.o,$ (SRCS)) DEPS: = $ (Patsubst%.o,%.d,$ (OBJS)) Missing_deps: = $ (Filter-out $ (wildcard $) (DEPS)), $ (DEPS)) Missing_deps_sources: = $ (wildcard $ (patsubst%.d,%.cpp,$ (missing_deps))). Phony:all deps objs Clean Veryclean rebuild Infoall: $ (executable) Deps: $ (deps) OBJS: $ (OBJS) Clean: @$ (rm-f) *. o @$ (rm-f) *.dveryclean:clean @$ (rm-f) $ (executable) Rebuild:veryclean Allifneq ($ (missing_deps),) $ (MISSING _deps): @$ (rm-f) $ (patsubst%.d,%.o,[email protected]) Endif-include $ (DEPS) $ (executable): $ (OBJS) $ (C C)-O $ (executable) $ (OBJS) $ (addprefix-l, $ (Libdir)) $ (addprefix-l,$ (LIBS)) Info: @echo $ (SRCS) @echo $ (OBJS) @echo $ (DEPS) @echo $ (MIS Sing_deps) @echo $ (missing_deps_sources)

Note: 1) The space character before the command line must be a tab (tab), for example, @$ (RM-F) is not a space before *.O, but a tab character;

Content resolution

1.Makefile Basic Syntax

Target is the destination file to be generated; dependency is a dependent file for target; command is used to generate the target line;

<target>: <dependency> <dependency> ... (tab) <command> (tab) <command> ...

2. Assignment symbol: = and =

: the difference between = and = is that the symbol: = indicates that the variable value is expanded immediately. For example:

A:=foo

b:=$ (A)

A:=bar

At this point, the value of B is still foo, because it has been expanded and will no longer change with the value of a.

3. Symbol # is a makefile comment symbol

4.wildcard function

srcs:=$ (wildcard *.cpp) indicates that all files with the. cpp extension in the current directory are enumerated and assigned to the variable SRCS. Please google for details.

5.patsubst function

OBJS: = $ (Patsubst%.cpp,%.o,$ (SRCS)) indicates that all strings that satisfy the pattern SRCs in $ (%.cpp) are replaced with%.O.

6.filter-out function

$ (Filter-out $ (A), $ (B)) means filtering out the contents of a from B and returning the remaining content;

7. ". Phony "

The target with the. Phony modifier is "pseudo-target" and does not need to generate a real file; make assumes that phony target is already generated and then updates the dependent file behind it and executes the command below it;

8.all deps OBJS Clean Veryclean rebuild Info

These are "pseudo-targets".

All is the first target, so it is executed by default when you enter make, and all generates or updates all *.cpp files corresponding to the *.d file and *.o file, and links all *.o files to generate executable $ (executable).

Deps only generate *.d files; What file is the. d file? It contains the dependency information for the code file.

OBJS only generates *.O files; o files are C + + code compiled intermediate result files, nonsense!

Clean is used to delete *.d files and *.o files.

Veryclean Delete the *.d file, *.o file, and also the executable file named $ (executable).

Rebuild call Veryclean to clear the result file before calling all recompile and link.

Info to view some information.

How to use:

Make Deps can execute deps;

9.ifneq...else...endif

Conditional statement, IFNEQ indicates that if you do not want to wait ... ；

10.include <files> Statements

Include indicates the inclusion of <files> content;

$ (DEPS) is a file that contains dependent information, and each source file corresponds to a. d file;-include $ (DEPS) means that the dependency information is included;

11. Link the *.o file, generate the executable file

Here comes the main course!

$ (executable): $ (OBJS)        $ (CC)-O $ (executable) $ (OBJS) $ (addprefix-l,$ (LIBS))

$ (executable) is the executable file name; $ (OBJS) for all. O filenames; $ (CC) here is g++;$ (addprefix-l,$ (LIBS) Add Reference Library;

How was the *.d file and the *.O file generated earlier? It seems that there is no command to generate them! Please look at the implied rules!

12. Implied rule (implicit rules)

$ (executable) depends on $ (OBJS), but Makefile does not specify who the $ (OBJS) depends on and does not specify the command to generate them;

At this point, the implicit rules for make begin to work; for each target in $ (OBJS), make automatically calls:

$ (CC) $ (CFLAGS) $ (cppflags) $ (target_arch)-C $<-o [email protected]

Generate. o files and. d files in turn;

$< represents the first file name of a dependent file list;

[Email protected] Indicates the target file name;

The. d file is generated because of the "-MMD" compilation option. When you add this option to g++, the compiler generates file dependency information and stores it in a. d file.

Each of the. cpp files generates a. d file and an. o file accordingly.

[Email protected] Symbol

The @ symbol before the command line indicates that the command line is not echoed;

14.CFLAGS and Cppflags

The two contain compilation options, please Google for more details.

-G add gdb debug information;

-wall prompt warning information;

-O3 represents the 3rd level optimization;

General makefile and parsing of C + + under Linux