Get Cache Info in Linux on ARMv8 64-bit platform__linux

On x86 platform, there are many ways to get cache information from a running Linux system. For example, by Checking/proc/cpuinfo, or by using tools, like Dmidecode, LSHW, Hwloc, etc. But don ' t forget "Everything is a file. From my opinion, the fundamental method to get whole the picture's cache information is by checking SYSFS.

Grep. /sys/devices/system/cpu/cpu*/cache/index*/*

These files are are populated by device Initcall cache_sysfs_init (void).

Now let ' s talk about ARM platform.

On arm 32-bit Arch, in least some versions of Arm arch, like armv7a, ARMV6, do have registers (cache type register) which s Tore cache information. But Linux doesn ' t support to populate cache information for those CPUs.

On ARM 64-bit Arch, sudeep Holla provided a patch (commit 246246cbde5e840012f853e27630ebb59f409486) in 2014 which Support for providing processor cache information to userspace through SYSFS. It is based on already existing implementations (x86, IA64, s390 and PowerPC).

The basic process is device initcall  cacheinfo_sysfs_init (void)  calls detect_ Cache_attributes (unsigned int cpu)  to get cache information from hardware and device. In this function, it calls hardware specific function  init_cache_level (unsigned int cpu)  and   populate_cache_leaves (unsigned int cpu)  to get cache information from hardware registers. In the ARM 64-bit case, these registers are CCSIDR, CLIDR, CSSELR. From this registers, cache line size, number of sets, cache hierarchy can is obtained. Then It'll call  cache_shared_cpu_map_setup (unsigned int cpu)  to get cache information from Device tree. Because some of cache hierarchy information is out of CPU core ' s view. For example, which cores are shared L2 cache. These information can are only the device tree.

It is good to get a ARM 64-bit box and practice it in that. We can use qemu-system-aarch64 as a alternative. But you probably'll say "There is no cache info in sysfs!". That ' s true. :-) Because there is no "Next-level-cache" in machine virt ' s default device tree. Function Cache_shared_cpu_map_setup'll return error. You can-below log from DMESG.

Unable to detect cache hierarchy from DT for CPU 0

So what should we did now? Fortunately, Qemu provides a way (-DTB) to load your own DTB file. We can modify the device tree to add "Next-level-cache". But where can we get the default device tree which we can based on? Fortunately, again, Qemu provides a way (-machine DUMPDTB=XXX.DTB) to dump the default device tree. This is steps.

Step 1:
Dump The default DtB file

qemu-system-aarch64-machine virt dumpdtb=virt_default.dtb <followed by othe  R options> Step

2:
decompile dtb file to DTS file

dtc-i dtb-o DTS virt_default.dtb > Virt.dts

Step 3: 
Add "Next-level-cache" to each CPU node. For and to add, just type "Grep-r" Next-level-cache "./" in your Kernel source code. You are should get a plenty of the samples. 

Step 4: Use
DTC to compile the modified DTS file to DTB file.

Step 5:
Load This new DtB file in Qemu.
QEMU-SYSTEM-AARCH64-DTB VIRT_NEW.DTB <followed by the other options>

Then you should is able to the cache information from your SYSFS.

Original: https://zhiyisun.github.io/2016/06/25/Get-Cache-Info-in-Linux-on-ARMv8-64-bit-Platform.html