Go dm9000a Commissioning (UP)

Unlike other network card chips, the DM9000 series network card chips are common on embedded development boards, especially those on the Arm-linux board, which are almost always done with the chip. Of course, other network card chip, such as the application of RTL8019 is also very common, in a lot of development boards are applied however RTL8019 introduction can be found on the Internet very detailed introduction, especially with a single-chip microcomputer for its low-level drive introduction is very rich. The following website describes the use of AVR driver RTL8019 Network card chip of the very detailed process, interested friends can refer to.

Http://members.home.nl/bzijlstra/software/examples/RTL8019as.htm AVR driver RTL8019 NIC Chip detailed introduction.

Anyway On the internet can also find a lot of information about DM9000 network card chip, but these are mostly about Linux or wince under the driver or porting, there is very little introduction to the microcontroller driver DM9000 example. So I'm here to explain the process of debugging dm9000e in detail, for reference only.

This paper mainly introduces the detailed process of single chip microcomputer driver dm9000e card chip. From the connection of the network card circuit, to the network card initialization related program debugging, and then to the implementation of the ARP protocol, step by step to introduce the debugging process in detail. If there is time, the UDP and TCP communication experiment process will be written out. Of course, it will be a single-chip computer to write DM9000 driver, and then want to write the Linux under the arm of the driver is much easier. Before commissioning, you should refer to two technical documents, which can be downloaded from the website below.

Dm9000e.pdf (Chip data Sheet) and DM9000 application Notes Ver 1_22 061104.pdf (Application manual)

http://www.davicom.com.tw

Or

DM9000 datasheet Vf03:http://www.davicom.com.tw/userfile/24247/dm9000-ds-f03-041906_1.pdf

dm9000a datasheet:http://www.davicom.com.tw/userfile/24247/dm9000a-ds-f01-101906.pdf

DM9000 Application Notes V1.22 http://www.davicom.com.tw/big5/download/Data%20Sheet/DM9000_Application_Notes_Ver_1 _22%20061104.pdf

First, the Circuit connection

The DM9000E network card chip supports 8-bit, 16-bit, 32-bit mode processors, and the supported processor types are set by the reset value of the chip pin Eedo (65 feet) and the wakeup (79 pin), such as a 16-bit processor that simply takes the two pins down Where the wakeup has a 60K pull-down resistor, the pin can be suspended, or as a NIC chip wake-up output. Please refer to the corresponding data sheet for other models.

Figure 1 DM9000 Pin

, for the processor-driven NIC chip, we are more concerned with the following pins: IOR, IOW, AEN, CMD (SA2), INT, RST, and the data pin sd0-sd15-sd31 and address pin sa4-sa9. Where the address pin with the Aen pin to select the card chip, for most applications is meaningless, because in our application is generally used only a network card chip, and these address pins are mainly used in multi-card chip environment to select one of them. The default base address for DM9000 work is 0x300, where we select SA9, SA8, and sa7-da4 to the lower level by default. Multi-network card environment can be configured according to TXD0-TXD3 SA4-SA7 to choose different network cards, here do not introduce, interested friends please refer to the Application manual and data sheet. The data pin sd0-sd31 is selected from the processor's data bus according to the previously described configuration processor mode, and the unused pins are left dangling. So, in addition to the address, data pins, the rest of the processor-related pins are important to us, and processor-independent pins, just follow the application manual to connect.

IOR and IOW are DM9000 read-write selection pins, low-level active, that is, low-power reading (IOR) write (IOW) operation, Aen is the chip selector pin, low-level active, the pin is low to read and write operations, cmd command/Data switch pin, low power reading command operation, Read and write data operation at high power level.

Figure 2 Read Timing

Figure 3 Write Timing

These pin interfaces and other microcontroller peripheral devices are basically the same pin interface, and its use is the same. For a single-chip bus interface, such as the 51 series, ARM and other direct connection can be. For non-bus interfaces, such as AVR Mega32 can be directly connected with the I/O pin analog bus timing. Refer to read-write timing when connecting, as shown in. Specific connection circuit, time I draw again, temporarily first slightly.

Second, write the driver

In this, I write the driver in C language, which requires a little bit of note that the C compiler used by the processor uses "big-endian" or "small-format", which can be found on the C compiler description of the corresponding processor. In general, the small-end format is more common. For a 8-bit processor, when writing a driver, can not be considered, but when writing network protocols, it is good to consider, because the format of the network protocol is the big-endian format, and most of the compiler or we are accustomed to the small-format, this need to pay attention to.

In DM9000, there are only two registers that can be accessed directly by the processor, which is named the CMD port and the data port. In fact, there are many control and status registers in the DM9000 (these registers are described in detail in the previous article), but none of them are directly accessible to the processor, and the methods for accessing these control and status registers are:

(1), write the address of the register to the CMD port;

(2), from the data port to read and write the Register;

1. Read and Write registers

In fact, the index port and the data port are differentiated by the CMD pin on the chip. The low level is the index port and the high level is the data port. Therefore, in order to implement the read-write register, you must first control the CMD pin.

If the bus interface is used to connect the DM9000, assume that the base address of the chip after the bus connection is 0x800300 (24 address bus), just the following method:

#define DM_ADD (* ((volatile unsigned int *) 0x8000300))

#define DM_CMD (* ((volatile unsigned int *) 0x8000304))

Write data to the DM9000 register

void Dm9000_reg_write (unsigned char reg, unsigned char data)

{

Udelay (20);//The subtle level delay function defined earlier, here delay 20US

Dm_add = reg;//writes the register address to the index port

Udelay (20);

Dm_cmd = data;//writes to data port, i.e. write-in register

}

Read data from DM9000 registers

unsigned int dm9000_reg_read (unsigned char reg)

{

Udelay (20);

Dm_add = reg;

Udelay (20);

Return dm_cmd;//to read data from registers

}

Note that the previous two macro definitions Dm_add and Dm_cmd, the defined content represents a pointer to an unsigned shape variable, where 0x800300 is the address of the DM9000 command port, the assignment to it is equivalent to writing the data to the address, The data is written to the DM9000 command port. The same goes for reading. This is a very common macro definition, which is typically defined in the processor as a general purpose register.

If there is no bus interface, you can use the IO port to simulate the bus timing method to read and write registers. Only the implementation steps are described here. First the I/O port of the processor is connected directly to the DM9000 's IOR (level matching case), and assuming there is already a macro definition "IOR" I/O port control DM9000 the IOR pin, the other port control DM9000 PIN is named the same, "PIO1" (according to the processor case, Can be composed of 8-bit, 16-bit, or 32-bit I/O ports) control data ports. This makes the macro name more intuitive. The function of the write register is as follows:

void Dm9000_reg_write (unsigned char reg, unsigned char data)

{

PIO1 = reg;

AEN = 0;

CMD = 0;

IOR = 1;

IOW = 0;

Udelay (1);

AEN = 1;

IOW = 1;

Udelay (20);

PIO1 = data;

AEN = 0;

CMD = 0;

IOR = 1;

IOW = 0;

Udelay (1);

AEN = 1;

IOW = 1;

}

Read Register is similar, here is a little bit. This process seems a bit complicated, hehe, actually implementation is quite efficient, the execution time is similar. This mode of analog bus timing is not really complicated, but the bus mode of automatic execution of the process is performed manually.

In DM9000, there are also PHY registers, also known as media-independent Interface Mii (media independent Interface) registers. The operation of these registers will affect the initialization of the NIC chip and the network connection, which does not operate here, so the access method for these registers is also a little bit here (in the previous article). Improper operation makes the NIC unable to connect to the network.

So far, we've written two basic functions: Dm9000_reg_write () and Dm9000_reg_read (), and the previous macro definitions Dm_add and Dm_cmd. The following will always be used.

2, initialize the DM9000 network card chip.

The process of initializing the DM9000 network card chip is essentially the process of filling in and setting up the control register of the DM9000, which is illustrated by the procedure as an example. Where the name of the Register macro definition is already defined in DM9000.H.

Note: In the function unsigned char is a byte unsigned int is two bytes

DM9000 initialization

void Dm9000_init (void)

{unsigned int i;

Io0dir |= 1 << 8;

IO1CLR |= 1 << 8;

Udelay (500000);

Io2set |= 1 << 8;

Udelay (500000);

IO1CLR |= 1 << 8;

Udelay (500000);

/* Above the part is to use an IO port to control the DM9000 's RST pin, which resets it. This step can be omitted, can be replaced by the following software reset */

Dm9000_reg_write (GPCR, 0x01);//Set GPCR (1EH) bit[0]=1 to make DM9000 GPIO3 output.

Dm9000_reg_write (GPR, 0x00);//GPR bit[0]=0 causes the GPIO3 output of DM9000 to be low to activate the internal PHY.

Udelay (5000);//delay 2ms or more wait for the PHY to power on.

Dm9000_reg_write (NCR, 0x03);//Software Reset

Udelay (30);//delay 20US or above wait for software reset to complete

Dm9000_reg_write (NCR, 0x00);//reset complete, set normal operating mode.

Dm9000_reg_write (NCR, 0x03);//The second software reset, in order to ensure that the software reset is completely successful. This step is necessary.

Udelay (30);

Dm9000_reg_write (NCR, 0x00);

/* Above completed DM9000 reset operation */

Dm9000_reg_write (NSR, 0x2c);//clear various status flag bits

Dm9000_reg_write (ISR, 0x3f);//Clear all interrupt flag bits

/* Clear the flag bit */

Dm9000_reg_write (RCR, 0x39);//Receive Control

Dm9000_reg_write (TCR, 0x00);//Send control

Dm9000_reg_write (Bptr, 0x3f);

Dm9000_reg_write (fctr, 0x3a);

Dm9000_reg_write (RTFCR, 0xff);

Dm9000_reg_write (SMCR, 0x00);

/* Above is the function control, specific functions refer to the instructions in the previous article, or the Reference data sheet Introduction * *

for (i=0; i<6; i++)

Dm9000_reg_write (PAR + i, mac_addr[i]);//mac_addr[] define it yourself, 6-byte MAC address

/* Above storage MAC address (network card Physical address) to the chip, there is no EEPROM, so you need to write in the * *

/* For a description of the MAC address, refer to the Web-related books/materials */

Dm9000_reg_write (NSR, 0x2c);

Dm9000_reg_write (ISR, 0x3f);

/* For insurance, there is a clear flag on it */

Dm9000_reg_write (IMR, 0x81);

/* Interrupt enable (or interrupt mask), that is, to turn on the interrupt we want, to turn off unwanted, only one receive interrupt is turned on here */

/* The specific meanings of all registers above refer to the previous article, or the reference data sheet */

}

So the initialization of the DM9000 is done, how, quite simple.

3. Sending and Receiving packets

Again, take the procedure as an example, by annotating the description.

Sending a packet

Parameters: Datas is the data buffer (in bytes) to be sent, length is the amount of data to send (two bytes).

void Sendpacket (unsigned char *datas, unsigned int length)

{unsigned int len, I; Dm9000_reg_write (IMR, 0x80);//Disable the network card interrupt to prevent interruption when sending data len = length;

Dm9000_reg_write (TXPLH, (len>>8) & 0X0FF);

Dm9000_reg_write (TXPLL, Len & 0x0ff);

/* These two sentences are to tell the DM9000 the length of the data to be sent */

Dm_add = mwcmd;//This is written for a processor with a bus interface, processors without a bus interface should be careful to add timing.

for (i=0; i<len; i+=2)//16 bit mode

{

Udelay (20);

Dm_cmd = Datas[i] | (DATAS[I+1]<<8);

}

/* Above is to write the data to be sent to the write FIFO in the DM9000 internal SRAM, note that the processor without the bus interface should be given the appropriate timing */

/* Just write the data to this register, Mwcmd is the DMA pointer of the DM9000 internal SRAM, according to the processor mode, automatically increase after writing */

Dm9000_reg_write (TCR, 0x01);//Send data to Ethernet

while ((Dm9000_reg_read (NSR) & 0x0c) = = 0);//wait for data to be sent complete

Udelay (20);

Dm9000_reg_write (NSR, 0x2c);//Clears the status register and does not have to handle interrupt flag bits because the sending data is not set to interrupt

Dm9000_reg_write (IMR, 0x81); The receive interrupt of the//dm9000 NIC is enabled

}

The above is the sending of packets, the process is very simple. The receipt of the packet does require some clarification. DM9000 a packet is received from the network, the packet is preceded by 4 bytes, "01H", "status" (the value of the same RSR register), "LENL" (Packet length 8 bits low), "lenh" (packet length is 8 bits high). So the first to read the 4 bytes to determine the status of the packet, the first byte "01H" means that the next is a valid packet, if "00H" means no packet, if the other value indicates that the NIC is not properly initialized, need to be re-initialized.

If the received packet length is less than 60 bytes, the DM9000 automatically complements the insufficient byte by 0, which reaches 60 bytes. At the same time, the DM9000 will automatically add 4 CRC check bytes after the received packet. Can not be processed. As a result, the minimum length of the received packet will also be 64 bytes. Of course, the number of valid bytes from the header byte can be based on the TCP/IP protocol, which is explained later in this section. The following is the function that receives the packet.

Receiving packets

Parameter: Datas is the data storage location (in bytes) for the received

Return value: Received successfully returned packet type, not successfully returned 0

unsigned int receivepacket (unsigned char *datas)

{

unsigned int i, TEM;

unsigned int status, Len;

unsigned char ready;

Ready = 0;//want to read to "01H"

Status = 0;//Packet state

len = 0; Packet length

/* More than 4 status bytes before valid packets */

if (Dm9000_reg_read (ISR) & 0x01)

{

Dm9000_reg_write (ISR, 0x01);

}

/* Clear the Receive interrupt flag bit */

/***********************************************************************************/

/* This place has encountered a problem, the following black font statement should be replaced with a red font, that is, the MRCMDX register if the first time to read the data, but also read once to determine that there is no data at all.

in the PING experiment proved that: each packet is the second read MRCMDX register operation and learned as a valid packet, the initialization of the Register to make a number of changes are still the result, but the following methods to achieve, will never miss the packet. */

Ready = Dm9000_reg_read (MRCMDX); The first read, generally read to the 00H

if (Ready & 0x0ff)! = 0x01)

{

Ready = Dm9000_reg_read (MRCMDX); Second read, always get the data

if ((Ready & 0x01)! = 0x01)

{

if (Ready & 0x01)! = 0x00)//If the second read is not 01H or 00H, it means that no initialization was successful

{

Dm9000_reg_write (IMR, 0x80);//Screen NIC interrupt

Dm9000_init ();//re-initialize

Dm9000_reg_write (IMR, 0x81);//Open NIC Interrupt

}

Retrun 0;

}

}

/* ready = Dm9000_reg_read (MRCMDX); Read a byte without pointer increment

if (! ( Ready & 0x01))

{

return 0;

}*/

/***********************************************************************************/

/* Above indicates that if the first byte received is not "01H", then there is no packet, return 0*/

Status = Dm9000_reg_read (Mrcmd);

Udelay (20);

len = Dm_cmd;

if (! ( Status & 0xbf00) && (Len < 1522))

{

for (i=0; i<len; i+=2)//+ bit mode

{

Udelay (20);

tem = dm_cmd;

Datas[i] = tem & 0x0ff;

Datas[i + 1] = (TEM >> 8) & 0x0ff;

}

}

Else

{return 0;

}

/* Above receive packets, note the same place where the packets are sent */

if (len >) return 0;

if (HON (ethbuf->type)! = Ethtype_arp) &&

(HON (ethbuf->type)! = ethtype_ip))

{

return 0;

}

Packet_len = Len;

/* Above the incoming packets to make some necessary restrictions, removal of large packets, removal of non-ARP or IP packets */return HON (Ethbuf->type); Returns the type of packet, where only the type of ARP or IP two is selected

}

Note: The above function uses some macro definitions, which have already been defined in the header file, as explained here: UInt16 is defined as a two-byte variable, defined according to the C compiler.

unsigned char buffer[1000];//defines a 1000-byte receive send buffer

UInt16 packet_len;//The length, in bytes, of the received and sent packets.

struct ETH_HDR//Ethernet head structure for ease of use later

{

unsigned char d_mac[6]; Destination Address

unsigned char s_mac[6]; Source Address

UInt16 type; Protocol type

};

struct ARP_HDR//Ethernet Header +ARP Header structure

{

struct ETH_HDR ethhdr; Ethernet Header

UInt16 Hwtype; Hardware type (1 means Ethernet MAC address is transmitted)

UInt16 Protocol; Protocol type (0x0800 means IP address is transmitted)

unsigned char hwlen; Hardware address Length (6)

unsigned char protolen; Protocol address Length (4)

UInt16 opcode; Action (1 for ARP request, 2 for ARP reply)

unsigned char smac[6]; Send-side MAC address

unsigned char sipaddr[4]; Send-side IP address

unsigned char dmac[6]; Destination MAC Address

unsigned char dipaddr[4]; Destination IP Address

};

struct IP_HDR//Ethernet Header +IP Header structure

{

struct ETH_HDR ethhdr; Ethernet Header

unsigned char VHL,//4-bit version number 4-bit header length (0x45)

Tos Service Type (0)

UInt16 len,//entire IP datagram total byte length

Ipid,//IP logo

Ipoffset; 3-bit ID 13-bit offset

unsigned char TTL,//Time to Live (32 or 64)

Proto Protocol (1 means icmp,2 means igmp,6 means tcp,17 means UDP)

UInt16 ipchksum; Header Checksum

unsigned char srcipaddr[4],//Source IP

DESTIPADDR[4]; Destination IP

};

The three header structures defined above are defined according to the relevant specifications of the TCP/IP protocol, and the ARP protocol is explained in detail later.

Go dm9000a Commissioning (UP)