How to set the S3C2440 bus frequency and clock in Linux

Many hardware functions require bus clock support, such as LCD and I2C. This article analyzes the bus clock of S3C2440 and the operations related to the clock frequency of S3C2440 bus in Linux. First, analyze the bus clock of the hardware S3C2440.

1. S3C2440 fclk hclk pclk:

The clock source first comes from the external crystal oscillator 12 MHz. For ARM920T kernels that must run at least MHz, this frequency is too low and cannot be used directly, therefore, first, the 12 MHz crystal clock signal must be upgraded through the PLL hardware circuit on the S3C2440 chip, and the specific frequency to which the clock signal is upgraded is controlled through the mpll control register. For example, if mpllcon is assigned 0x5c <12 | 2 <4 | 1, the output clock of the PLL circuit can be set to 400 MHz, that is, the external clock of 12 MHz is upgraded to MHz for MHz. In addition, you can configure upll for the system USB clock to obtain the appropriate clock signal required by the USB, which is not described here.

Fclk: When the PLL can stably output data, its output signal is directly used by fclk. fclk is connected to the ARM kernel of S3C2440. It is equivalent to running the ARM Kernel at MHz.

How can I obtain the clock of peripherals such as the I2C controller LCD controller?

For the above peripherals, the frequency of MHz after the PLL is upgraded is too high and requires downgrading. Therefore, the fclk frequency is reduced to pclk and hclk by the divider. How can we reduce the workload? You can use the clkdivn Sub-division control register to control the sub-division.
For example, when clkdivn is assigned 0x5, that is, fclk: hclk: pclk = 400 MHz: 100 MHz: 50 MHz.
There are two peripheral clock types for S3C2440: pclk and hclk.
Peripherals using pclk include: wdt, IIS, I2C, PWM timer, MMC interface, ADC, UART, gpio, RTC and SPI (IO type)
Peripherals using hclk include: memory controller, interrupt controller, LCD controller, DMA and USB Host block (bus type)
2. settings of the S3C2440 clock in U-boot and Linux
The S3C2440 bus clock is set in bootload. In Linux, only the values in the mpll and clkdivn registers are read. These values are used to calculate the current operating frequency of the S3C2440 and will not be modified!
Uboot's clock settings are completed in the board_init () function. Linux clock settings are in the smdk2440_map_io-> s3c24xx_init_clocks ()-> (CPU-> init_clocks) (xtal); here the cup value is arch/ARM/plat-s3c24xx/CPU. cpu_ids array in C.
The S3C2440 code is 0x32440001, and the initial clock function is s3c244x_init_clocks.
In this function:
Call s3c244x_setup_clocks to calculate the Running frequency of the current device. Call the s3c2410_baseclk_add function to link the I2C uart spi rtc and other peripherals that need to use the clock through the linked list.