In-depth understanding of Java Virtual Machines (i) understanding platform Independence

write Once Run Anywhere, write multiple runs at oncefirst, The operation mechanism of Java

As shown, the Java top-level application is opaque to the platform, and the Java source program is compiled into a platform-independent bytecode file (class File) with a common Java compiler, while the Java Virtual Machine (JVM) interprets the bytecode file at run time, i.e. Java bytecode is platform agnostic , languages in the Java ecosystem, such as android, scala, and so on, can be identified and run as long as the bytecode files are compiled according to Java Rules. The premise of multiple operations is that different versions of Java virtual machines are required, and the Java virtual machines of different system platforms are not the Same. The class file is loaded by the ClassLoader (classloader) in the JVM (java virtual machine), which translates it into machine instructions for a specific platform environment and Executes.

Is the Java program specific running Process:

　　　　

In general, the byte code in the class file is interpreted by the Java interpreter as a command that the machine can recognize to run, and the immediate compiler's role is to compile the running "hot spot", the frequently executed command, into a cost-to-machine code that can be executed quickly for subsequent Executions.

second, Platform Architecture1. von Neumann system

, the equipment of the system has the following characteristics:

• Must have a memory, a controller, and an arithmetic unit
• Must have input and output devices for human-computer communication
• Only one memory, instruction and data stored in the same memory space, but the storage address is different
• The processor uses the same bus to process instructions and data in memory, instructions and data have the same data width, and instructions and data cannot be accessed simultaneously

Advantages:

• Use the instruction as data, can modify the instruction value, convenient software upgrade
• Data area and command area share memory, convenient data area and command area size flexible adjustment
• Improve memory utilization efficiency
• Relatively simple bus and control, low cost
• Requirements for peripherals are relatively low, requiring only one memory

Disadvantages:

• The same bus time-sharing, reading instructions can not operate data, can not walk the assembly line
• The next command can be taken after the execution phase of the previous Instruction. (fetch, decode, Execute)

2. Harvard system

, the Harvard System's Equipment has the following characteristics:

• Using two separate memory modules to store instructions and data, each enclosure does not allow the coexistence of instructions and data;
• Using a separate two bus, respectively, as a dedicated communication path between the CPU and each memory, and there is no correlation between the two buses;
• The command and access data can be carried out simultaneously, the microprocessor has high execution efficiency;
• Provides a large memory bandwidth;
• Suitable for digital signal processing, Most DSPs are Harvard Structures.

Advantages:

• High efficiency of execution instruction, pipeline mode;
• When the previous instruction is decoded, the second one refers to;
• The second decoding, the third one refers to.

Disadvantages:

• Difficult to operate the modification instructions, software is not good upgrade;
• The command area and data area are independent so that the memory utilization efficiency is not high, if the program changes frequently;
• Bus more expensive, high requirements for peripherals.

The von Neumann is ideal for models like pcs, and the Harvard structure is more suitable for tasks that are monotonous but require high-speed execution of cpus.

iii. Instruction Set Classification

　　The instruction set is divided into complex instruction set cisc, thin instruction set risc, and explicit parallel instruction set Epic.

　　

　　

Usually we talk about it with CISC and Risc.

The simplified instruction set RISC instruction system is relatively simple, the hardware only executes the limited and commonly used instruction, the most complex instruction relies on the mature compiling technique, synthesizes by the simple Instruction. At present, Some high-end computers use a streamlined instruction set architecture, such as the IBM Power series, Hp's Alpha and Pa-risc series, and the Sun's UltraSPARC Series. Using the Harvard bus structure, single-cycle execution instructions, can achieve efficient pipeline operation, oriented to high-level language.

The complex instruction set cisc, the program each instruction serially executes sequentially, this kind of control is relatively simple, but the computer parts utilization is low, the instruction is unequal, the instruction number is many, therefore the programming and the design processor is more Troublesome. But the software application based on CISC design is very common, so the microprocessor has been taking the CISC development way. The CISC server is mainly based on the Intel architecture of the server, usually referred to as the x86 platform is the CISC architecture.

　　　　

four, Large tail end and small tail end

　　Large tail end and small end is what we usually call "size end" problem, small end refers to the low end of the data is stored in the lower address, high-level storage in the higher address, and the large end refers to the low data is stored in the high address, highs stored in the low address.

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In-depth understanding of Java Virtual Machines (i) understanding platform Independence