Learn the assembly instructions that the Linux kernel often encounters (2)

Source: Internet
Author: User
Tags bitwise processing instruction

reprint: http://blog.sina.com.cn/s/blog_4be6adec01007xvh.htmlJnge: The instruction Mnemonic-(a signed number comparison) is less than and not equal to the transfer (equivalent to JL). When SF and the of the Zf=0 are transferred (the direct short transfer within the segment).

JNL: Instruction Mnemonic-(signed number comparison) is not less than time-shifted (equivalent to Jge). When SF and of of the same number, or zf=1, then transfer (within the paragraph direct short transfer).

Jnle: Instruction Mnemonic-(signed number comparison) is not less than and not equal to transfer (equivalent JG). SF and of the same number, and zf=0 when transferred.

Jno: Simple Conditional transfer instruction mnemonic--No overflow transfer for previous operation. Of=0 is transferred (direct short transfer within paragraph).

JNP: Simple Conditional transfer instruction mnemonic-odd check transfer. Pf=0 is transferred (direct short transfer within paragraph).

JNS: Simple Conditional transfer instruction mnemonic--the result of the previous operation is a positive shift. Sf=0 is transferred (direct short transfer within paragraph).

JNZ: Simple Conditional transfer instruction mnemonic-unequal transfer (same as JNE). Zf=0 is transferred (direct short transfer within paragraph).

JO: Simple Conditional transfer instruction mnemonic--previous operation overflow transfer. Of=1 is transferred (direct short transfer within paragraph).

JP: Simple Conditional transfer instruction mnemonic--parity transfer. The number of 1 in the previous operation result is even, and the pf=1 is transferred (direct short transfer within the segment).

JPE: Simple Conditional transfer instruction mnemonic--parity transfer. The number of 1 in the previous operation result is even, and the pf=1 is transferred (direct short transfer within the segment).

JPO: Simple Conditional transfer instruction mnemonic-odd check transfer. Pf=0 is transferred (direct short transfer within paragraph).

JS: Simple Conditional transfer instruction mnemonic--the result of the previous operation is a negative transfer. Sf=1 is transferred (direct short transfer within paragraph).

JZ: Simple Conditional transfer instruction mnemonic--equal transfer (same as JE). Zf=1 is transferred (direct short transfer within paragraph).

Lable: Defines a symbol name pseudo-directive-defines a variable or label of a specified type for the current storage unit.
One, lable and variables.
Example Timb lable BYTE
TIMW DW 4142H The first sentence defines the word variable timw a new name timb, and modifies the Type property to bytes. You should use the variable name TIMW later if you access the variable as a character type, and you should use the variable name timb when you access the variable as a byte type.
Second, the lable with the marking.
Example POINTF lable far Pointn:mov Ax,[bx+si] The first sentence to the second sentence implicitly defined near the label POINTN take a new name POINTF, and modify the Type property to FAR. This allows you to act as
The target designator for the transfer or invocation instruction in the other code snippet (the label is PointF).

LAHF: Instruction Mnemonic--flag register (PSW) low 8-bit content sent in AH.

LDS: Instruction Mnemonic--takes an address pointer to a data segment register. Requires that the source operand is a two-word memory operand, the purpose operand is a 16-bit general-purpose register, a pointer, or a variable-address register, but not a segment register. When the instruction executes, the low address in the double-word memory operand is transferred to the specified register, and the high address is transferred to the DS register.
Example: LDS Si,data_seg[di] by Data_seg[di] can be obtained in the data segment of the valid address EA (that is, intra-segment offset). The target pointer is stored in the EA and ea+2. The EA holds the intra-segment offset of the target pointer, which is sent to the si;ea+2 storing the segment address of the target pointer and sent to the DS.
Example: variable name one DD variable name two
......
LDS SI variable Name one
The EA and segment addresses of the data segment where the variable name is located are stored in the variable name and the EA is sent to the DS by the address of the Si,ea+2 store.

LE: relational operator--less than equals. If the condition is met, the output is full 1 (all bits), otherwise all 0.

LEA: Instruction Mnemonic--takes a valid address. The offset address of the memory operand is transferred to the universal register, pointer, or variable address register. This directive is commonly used to establish the register pointer required for a string operation instruction.
Example one LEA si, variable name (equivalent to MOV si OFFSET variable name);
Example two LEA Ax,[ax] (the EA of the storage unit that SI refers to is sent to AX, while MOV Ax,[si] sends the contents that the storage unit holds)

LENGTH: Numeric return operator. It is preceded by a variable name, and the value returned is the number of elements of the array variable. If the variable is described with DUP, the value before the DUP is returned, and if there is no DUP description, the returned value is always 1.

LES: Instruction Mnemonic--takes the address pointer to the data segment register. Requires that the source operand is a two-word memory operand, the purpose operand is a 16-bit general-purpose register, a pointer, or a variable-address register, but not a segment register. When the instruction executes, the low address in the double-word memory operand is transferred to the specified register, and the high address is transferred to the ES register.

LDCK: Command Mnemonic--block bus. A single-byte prefix instruction added to the front of any instruction, which is used to maintain the latch signal of the bus until the instruction with which it is mated is executed.

Local: Macro directives--local symbols (variables, labels) are defined. When the macro is expanded, the assembler assigns a special symbol to the form parameter after the local, and then replaces the form parameter in the macro instruction body with the local point. This avoids duplicate definitions that occur when the macros are called multiple times by these symbols.

LODs: Command mnemonic--load string. Generally with LODSB or LODSW.

LODSB: Instruction Mnemonic--bytes loaded (taken from the byte string). It feeds the byte data indicated by the DS segment Si into the AL register and modifies the address in the SI according to the direction Mark DF. That is, when df=0, address plus 1; df= 1 o'clock, address minus 1.

LODSW: Instruction Mnemonic--word loading (taking number from string). It feeds the word data indicated by the DS segment SI into the AX register and modifies the address in the SI according to the direction flag df. That is, when df=0, address plus 2; df= 1 o'clock, address minus 2.

Loop: Command Mnemonic--loop control. For each execution, the content of CX is reduced by 1, and if it is less than 0 after minus 1, it is transferred to the destination address, otherwise, the instruction after loop is executed.

Loope: Instruction mnemonic-loop control (equals Loopz). For each execution, the content of CX is reduced by 1, if it is less than 0 after minus 1, and zf=1 is transferred to the destination address; otherwise, the content after Loope is executed.

LOOPZ: Instruction mnemonic-loop control (equals Loope). For each execution, the content of CX is reduced by 1, if it is less than 0 after minus 1, and zf=1 is transferred to the destination address; otherwise, the content after Loopz is executed.

LOOPNE: Instruction mnemonic-loop control (equals LOOPNZ). For each execution, the content of CX is reduced by 1, if it is less than 0 after minus 1, and zf=0 is transferred to the destination address; otherwise, the content after Loopne is executed.

LOOPNZ: Instruction mnemonic-loop control (equals Loopne). For each execution, the content of CX is reduced by 1, if it is less than 0 after minus 1, and zf=0 is transferred to the destination address; otherwise, the content after LOOPNZ is executed.

Low: The byte decomposition operator (operator). Used to detach (take) a low byte from an operand (a number or address expression).

LT: relational operator--less than. If the condition is met, the output is full 1 (all bits), otherwise all 0.

Macro: Macros--macro definition.

MASK: operator. Make the specified field in the record everyone is 1, and everyone else is 0.

MEMORY: Pseudo-instruction-segment definition (combination type). The segment should be positioned at the highest address of all other segments in memory. If the memory mode is used in more than one paragraph, the first encountered segment is treated as memory, while the other segments are treated as common.

MOD: arithmetic operator--modulo (the remainder after the division is divisible).

MOV: Instruction Mnemonic-universal data transfer. Note that there is no direct data transfer between the ① two segment registers, there is no direct data transfer between ② two storage units (can be used with Movs), one of two operands must be a register or an immediate number, and the ③ immediate count and segment register CS cannot be used as the destination operand.

MOVS: Instruction mnemonic-string transfer. Similar to MOVSB and MOVSW, but must describe the type of data string (Word or byte).

MOVSB: Instruction mnemonic-string (byte) transfer. A byte data in the data segment pointed by SI is transferred to a byte storage unit in the additional segment pointed by Di, and the addresses in SI and Di are modified according to the direction flags. When df=0, the address is added 1, and when df=1, the address is reduced by 1.

MOVSW: Instruction Mnemonic--string (word) transmission. A Word data in the data segment pointed by SI is transferred to a word storage unit in the additional segment pointed by Di, and the addresses in SI and Di are modified according to the direction sign. When df=0, the address is added 2, and when df=1, the address is reduced by 2.

MUL: Instruction Mnemonic--unsigned number multiplication. Byte multiplication: (AL) * (source operand)->ax
Word multiplication: (ax) * (source operand)->dx and AX
If the high half of the result (ah or DX, corresponding byte and word) is a non-0 value, then CF and the of 1; otherwise CF and of the Qing 0.

NAME: Pseudo-directive--module definition. The program will take the module name for the given program module. The format is the name of the module. When the assembly is processed, a module is a separate assembly unit. Assembly processing only takes place until the end of the module closing sentence. If the module is the main module, the END statement can indicate a label that represents the startup address of the program.

NE: Relational operators--unequal. If the condition is met, the output is full 1 (all bits), otherwise all 0.

NEG: Instruction mnemonic--complement. Adds 1 to each bit of the destination operand (including the sign bit). If the byte operation is 128, or if 32768 is taken during the word operation, the operand is the same, but the overflow flag of the position. The operand can be a register or a memory unit, but not a segment register or an immediate number. The result is sent back to the destination operand. The execution results affect not only the flag bit AF, CF, OF, PF, SF, and ZF, but generally always cf=1 (unless the operand is 0).
NONE: Pseudo-directive--segment definition (combination type). This paragraph does not logically relate to other paragraphs, and each paragraph has its own base address. This is the implied combination type.

NOP: Instruction Mnemonic--null operation. Used for program debugging.

Not: The logical operator (in the operand portion of the statement) or the logical operation instruction mnemonic (in the opcode section of the statement)-bitwise NON (negation). The contents of the destination address are reversed and then fed into the destination address.

Of:overflow flag, overflow flag, 11th byte in the flag register. In the course of the operation, if the operand exceeds the range that the machine can represent, at this point of 1. For addition, the of bit is set according to the symbol of the operand and its result, if the symbol of the two operand is the same, and the symbol of the result is opposite, the of 1, or 0.

OFFSET: Numeric return operator. It is preceded by a variable name or label, and the returned value is the offset address of the segment where the variable name or label resides.

OPD: Textbook Symbol--the purpose of the operand.

OPR: Textbook symbol--source operand.

Or: A logical operator (in the operand portion of the statement) or a logical operation instruction mnemonic (in the opcode section of the statement)-bitwise OR. Any one of the two bits of the "or" operation is 1, the result is 1.

ORG: Pseudo-directive--positioning (assembly address counter). At the beginning of each segment of the source program or block of data, indicate the starting address of the program or data block following the statement, and the remaining instructions or data are stored in successive address cells.
Example one ORG $+10 means skipping 10 bytes.
An example of a two-ORG numeric expression (a value of 0-65535) represents a value that is changed to a numeric expression.

Out: Instruction mnemonic--output. Transfer the content from Ax or Al to an output port. The addressing method is the same as in.

PA: Textbook symbol-The physical address of a storage unit. For instructions, pa= (CS) moves Left 4 bits + (IP);
For stack segment data, pa= (ss) shifts Left 4 bits + (SP), or pa= (ss) shifts Left 4 bits + (BP);
For data segment and additional data segment data, pa= (ds or ES) + offset address of the variable.

PARA: Pseudo-directive--segment definition (positioning type mode). Specifies that the starting address of each segment is always 16 at the time of positioning, and the last four binary number must be 0. This is the simplest way to locate, but there are often gaps between segments (up to 15 bytes). The default positioning method is to locate by para.

Page:① pseudo-directive--segment definition (positioning type mode). Requires that the segment start address is an integer multiple of 256, that is, the boundary of the segment must be the boundary of the page. The minimum two bits (16 binary) of the segment address must be 0. ② Pseudo-instruction--format control. Specifies the number of rows (10-255) per page of the list file generated by the assembler, and the number of characters (60-132) per line. or specify a new page (with a + sign) to output.

Pf:parity flag, parity flag, in the 2nd byte of the flag register, when the result of the operation (refers to the lower 8 bits) 1 of the number is even 1, or 0. This flag is primarily used to detect errors in the transmission of data.

POP: Instruction Mnemonic--out of the stack. Eject the top element of the stack to a register, except for the segment Register (CS) or memory. First, the SP refers to the contents of the low 8-bit, SP plus 1, and then the SP refers to the contents of the high 8-bit, SP plus 1.

Popf: Instruction Mnemonic--sends the word data at the top of the stack to the flag register. For the TF and the of set, the values are placed in ax, pressed into the stack, and then fed into the flag register with Popf. This method is the only feasible placement method for the TF and the of flag bits.

PROC: Pseudo-directive--procedure (subroutine) definition (start). Define a subroutine and indicate that it is near or far process. The procedure defined is required to be defined as a far process if it is loaded directly by DOS and starts execution.

Psw:program status Word, the program status Word register, consists of the Condition code flags (OF, SF, ZF, AF, PF, CF) and control flags (DF, IF, TF).
11 10 9 8 7 6 4 2 0
─┬─┬─┬─┬─┬─┬─┬─┬─┬─┬─┬─┬─┐
│of│df│if│tf│sf│zf││af││pf││cf│
─┴─┴─┴─┴─┴─┴─┴─┴─┴─┴─┴─┴─┘

PTR: Modifies the attribute operator. The type attribute used to explicitly indicate the variable, label, or address expression (valid only within the Directive). Before the type is placed in PTR, it can be byte, WORD, DWORD, near, far.

Public:① pseudo-directive--segment definition (combination type). This segment is combined with the same ' class ' segment with the same name as the public type described in other modules to form a physical segment (less than or equal to 64K), a common segment base, ② pseudo-directive--defines a global symbol. Indicates which symbol constants, variables, labels, and procedure names defined in the module (which are generally the far process for several modules) can be referenced by other modules.

PURGE: Macro directive--cancels macro definition.

PUSH: Instruction Mnemonic--into the stack. Presses a register, a Word data in the segment register, into the stack. High 8-bit advanced, SP minus 1, low 8-bit backward, SP minus 1.

PUSHF: Instruction Mnemonic--presses the contents of the flag register into the stack. can be used to protect flag bits (recovery with Popf) in subroutine calls and interrupt services.

RCL: Instruction Mnemonic--with carry loop left shift.
Format: RCL target operand, 1
or RCL purpose operand, cl (where CL is the number of moves stored)
┌─┐┌───────────────┐
┌│cf│←│←─────────────│←┐
│└─┘└───────────────┘│
└───────────────────────┘

RCR: Instruction Mnemonic--with carry loop right shift.
┌───────────────┐┌─┐
┌→│─────────────→│→│cf│─┐
│└───────────────┘└─┘│
└───────────────────────┘

Record: pseudo-instruction-design a single-byte or double-byte record format. The instruction format is,
Record name: Field name 1:= expression, field name 2:= expression ...
After a record is defined, the memory variable must be defined using the method of initializing the record, in the form
Variable name Record name: expression, expression, ... >
or variable name Record name number dup (expression, ...). >

REP: Instruction Mnemonic--repeating prefix. It allows the serial instruction to be executed repeatedly (CX is not equal to 0), and the content of CX is reduced by 1 per execution.

Repe: Instruction Mnemonic--repeating prefix. When two strings are equal, i.e. zf=1, it can make the serial instruction execute repeatedly (CX is not equal to 0 execution), each time, CX content minus 1. (exactly the same as REPZ)

REPNE: Instruction Mnemonic--repeating prefix. When two strings are not equal, i.e. zf=0, it can make the string instruction to execute repeatedly (CX does not equal 0), each time, CX content minus 1. (exactly the same as REPNZ)

REPNZ: Instruction Mnemonic--repeating prefix. When two strings are not equal, i.e. zf=0, it can make the string instruction to execute repeatedly (CX does not equal 0), each time, CX content minus 1. (exactly the same as REPNE)

REPT: Macro--repeating block (ends with ENDM).
Format: REPT Repeat Count
Repeating block
Endm
This macro directive is used to determine the number of repetitions.

REPZ: Instruction Mnemonic--repeating prefix. When two strings are equal, i.e. zf=1, it can make the serial instruction execute repeatedly (CX is not equal to 0 execution), each time, CX content minus 1. (exactly the same as Repe)

RET: Instruction Mnemonic--return.
Return within one or more paragraphs. First, the word on the top of the stack is fed into the IP, and the SP increases by 2. With an immediate number, the SP adds an immediate number (discarding some parameters that were put into the stack before the call was executed).
Return between paragraphs Ii. The word in the top of the stack after the IP (SP 2), and then the top of the stack of words into the cs,sp and then increase by 2. With an immediate number, the SP adds an immediate number.

ROL: Instruction Mnemonic--loop left shift.
Format: ROL target operand, 1
or rol purpose operand, cl (where CL is the number of moves stored)
┌─┐┌───────────────┐
│cf│←┬│←─────────────│←┐
└─┘│└───────────────┘│
└──────────────────┘

ROR: Instruction Mnemonic--loop right shift.
┌───────────────┐┌─┐
┌→│─────────────→│┬→│cf│
│└───────────────┘│└─┘
└──────────────────┘

SAHF: Instruction Mnemonic--the contents of the AH register are sent to the low byte of the flag Register (PSW), and the high eight bits of the flag register remain unchanged.

SAL: Instruction Mnemonic--the arithmetic left shift with the number of symbols. Often used to multiply by 2.
The format is: SAL-intent operand, 1
When the number of shifts is greater than 1 o'clock, the number of shifts should be pre-placed in the CL register.
The format is: SAL purpose operand, CL
┌─┐┌───────────────┐
│cf│←│←─────────────│←0
└─┘└───────────────┘
If the symbol bit changes, the 1 is sent to the of of flags, indicating that the highest bit of the operand before the shift is different from the highest bit after the shift.

SAR: Instruction Mnemonic--the arithmetic right shift with the number of symbols. The sign bit remains the same. Often used to divide by 2. When the number of shifts is greater than 1 o'clock, the number of shifts should be pre-placed in the CL register.
┌───────────────┐┌─┐
┌→│─────────────→│→│cf│
│└───────────────┘└─┘
└──┘

SBB: Instruction Mnemonic--with borrow subtraction (minus CF value). Used for multi-byte subtraction operations. Subtract two high-level characters and subtract the low-borrow cf.

SCAS: Instruction Mnemonic-string search (scan). Usually with SCASB or SCASW.

SCASB: Instruction Mnemonic-byte-string scan (search). The content in the AL register is compared with the byte data specified by the ES segment Di (minus), if equal (the result is 0), zf=1. and change the address in Di according to the value of the direction mark DF, namely df=0, address plus 1; df=1, address minus 1.

SCASW: Instruction mnemonic-string scan (search). The content in the AX register is compared (minus) with one of the word data specified by the ES segment di, if equal (the result is 0), zf=1. and change the address in Di according to the value of the direction mark DF, namely df=0, address plus 2; df=1, address minus 2.

SEG: Numeric return operator. It is preceded by a variable name or label, and the value returned is the segment base (the contents of the segment register) where the variable name or label resides.

SEGMENT: Segment defines pseudo-directives. The format is the paragraph name SEGMENT [positioning method] [combination] [' category ']. When defining a segment, you can also give the category of the segment in the segment statement, which is a string enclosed in parentheses. When a connection is processed, the link program places all segments of the same category name in a contiguous storage area. Each segment of the same class is connected, first appearing in front, then after.

Sf:sign flag, Symbol flag, 7th byte in the flag register. Records the sign of the result of the operation, and the result is a negative 1.

SHL:
One, arithmetic operator--shift left (1 bits is the equivalent of multiplying by 2).
Second, instruction mnemonic--the logical left shift of the unsigned number. Often used to multiply by 2. When the number of shifts is greater than 1 o'clock, the number of shifts should be pre-placed in the CL register and written as "SHL OPD CL".
┌─┐┌───────────────┐
│cf│←| ←─────────────│←0
└─┘└───────────────┘

Short: the attribute operator (operator). Used to specify the properties of the turn-to address in the JMP directive, indicating that the byte distance between the turn (destination) address and this instruction address is between 128 and +127.

SHR:
One, arithmetic operator--Move right (1 bits is equivalent to divided by 2).
Second, instruction mnemonic--the logical right shift of the unsigned number. Often used to divide by 2. When the number of shifts is greater than 1 o'clock, the number of shifts should be pre-placed in the CL register, written as "SHR ..., cl".
┌───────────────┐┌─┐
0→│─────────────→│→│cf│
└───────────────┘└─┘

Si:source Index, the source variable address register. Associated with DS, used to determine the offset address of a storage unit in a data segment. In the string processing instruction, SI indicates the address of the source operand, and the implied segment is the current data segment.

SIZE: Numeric return operator. It is preceded by a variable that returns the total number of bytes (the product of length and type return values) that the array variable occupies.

Learn the assembly instructions that the Linux kernel often encounters (2)

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