A Brief Introduction to Linux mem Arch
The first thing that comes to mind is the Linux mem map.
3G + 1g
Simple painting
0 ~ 0x1000 4 K boot Secure Code: nullpointer affairs
0x1000 ~ 3G user space
3G-16 m ~ 3G module load mem Space
3G ~ 3G + 896 m physical mem: Direct Map
Vm_start ~ Vm_end for vmalloc use
Later protect space
Other, the last page is used to put the error code
Generally, ARM core has several mem ports, such as D-cache, I-cache, and DMA.
The cached va must pass MMU to generate Pa. the MMU contains TLB and TLB will assist in management permissions. This involves some vpvt and vppt issues. TLB will actually give
A little messy, PGD, PMD, PTE,
Context switch, TLB flush back
Thread user space, Master PTE, corse PTE, update
TTB, asid
Repeat
During download, uboot uses phyaddr, which does not have MMU function? Really?
What is the copy in the kernel is the use of vaddr. If you want to dump everything, dump from page_offset?