Linux memory management mechanism details, linux memory management details

Source: Internet
Author: User

Linux memory management mechanism details, linux memory management details

Memory Management Mechanism

The linux system supports multi-task and multi-process processing, so that the CPU and other hardware utilization will be higher, in this case, we need to consider how to allocate the system's limited physical memory to multiple programs in a timely and effective manner. This is called memory management.

Three problems to be solved in memory management:

1. process space cannot be isolated: because the program directly accesses the physical memory, the memory space used by the program is not isolated.

2. memory usage efficiency is low: We have three programs, program 1, 2, 3. in the process of program 1 running, 10 MB of memory is required; in the process of Program 2 running, MB of memory is required; in the process of Program 3 running, 20 mb of memory is required. If we want to run three programs at the same time, the only way is to use the virtual memory technology to write data temporarily not used by some programs to the disk and read the data back to the memory as needed. However, when reading data from the disk to the memory, I/O operations are time-consuming, resulting in low efficiency.

3. The address of the program running cannot be determined: each time the program runs, a large enough memory area should be allocated to the memory, but the idle location is uncertain.

Memory Management Method:

Now the memory management method is inProgramAndPhysical memoryBetweenVirtual MemoryConcept,Each program has its own memory address space.In this way, process isolation is achieved.Here, the process address space refers to a virtual address.. Since the virtual address is added between the program and the physical address, it is necessary to resolve the ing from the virtual address to the physical address, and the program will eventually run to the physical memory.

HoweverThe ing method is the segmentation and paging technology.. The implementation of the paging mechanism requires hardware implementation, and the hardware name isMMUIt is responsibleConvert a virtual address to a physical addressThat is, to find the physical page from the virtual page.

Basic concepts:

Physical address:Memory chip-level unit addressing, which corresponds to the address bus connected to the processor and CPU

Virtual Memory:Is an abstract description of the entire memory, called virtual memory. The process uses the address in the virtual memory and the operating system converts it into a real physical address. With this abstraction, a program can use a much larger address space than a real address. Even multiple processes can use the same address (the physical address after conversion is not necessarily the same)

Logical Address:The logical address refers to the address used to specify an operand or an instruction in the machine language instruction. A logical address is represented by a segment identifier plus an offset of the relative address in the specified segment.

Linear address:It is also called a virtual address. It is not a real address. If the logical address is the address before the hardware platform's segment management switch, the linear address corresponds to the address before the hardware page memory conversion.

To convert a virtual memory address to a physical address, the CPU performs the following steps:

1. First, give a logical address (intra-segment offset)

2. the CPU needs to use its segment Memory Management Unit to first convert the logical address to a linear address, and then use its page memory management unit to convert it to the final physical address.

Linux CPU page memory management:The CPU page Memory Management Unit is responsible for converting a linear address (Virtual Address) into a physical address. Linear addresses (virtual addresses) are divided into fixed-length groups, called pages. For example, a 32-bit linear address (virtual address) of a machine is 4 GB at most and can be divided into 4 kb in one page. It is divided into a large array with a power of 2 to 20. This large array is called a page Directory. To ensure that the physical memory can be fully utilized, the kernel automatically exchanges infrequently used data blocks in the physical memory to the virtual memory when appropriate, the frequently used information is retained to the physical memory.

Concept:

Page directory:32-bit, 4 GB virtual address, divided by 4 kb into a large array of 20 to the power of 2, this large array is called "page Directory", the page Directory is unique, its address is placed in the CPU's second register, which is the start of address conversion.

Page table:In the virtual memory, the page table is a ing table concept,The data structure that maps a linear address (Virtual Address) to a physical address is called a page table.The page table is stored in the primary storage, and the page table must be initialized by the kernel before the paging unit is enabled.

Page:There are two types of pages. One is a virtual address page, that is, a virtual address is divided into a group with a fixed length unit, called a page. The physical memory is divided into a fixed length Management Unit, it is called a page (physical page (page box, page frame ))

The specific process of Page Management:

1. In the paging unit, the address of the page Directory is placed in the CPU's Cr 3 register, which is the starting point for address conversion.

2. Each process has its own virtual address space. To run a process, you first need to put its page Directory address in the CR 3 register and save the process.

3. Each 32-bit linear address is divided into three parts:Page Directory Index(10 digits ),Page table Index(10 digits ),Offset(12 bits) "That is to say: the page Directory has 2 ^ 10 page tables, each page table has 2 ^ 10 pages, and each page has 2 ^ 12 bytes"

Conversion steps:

Step 1: The page Directory address of the transferred process (when the operating system schedules the process, it loads this address into the C3)

Step 2: locate the corresponding index item-page table address based on the top 10 linear addresses

Step 3: locate the corresponding index item in the page table based on the 10-digit in the middle of the linear address-the starting address of the page

Step 4: add the start address of the page and the last 12 digits of the linear address to obtain the physical address.

IO space and memory space:

Each peripheral is controlled by reading and writing their registers. Generally, a device has more than one register and accesses them at a continuous address. These registers are in the IO space and are called IO ports. In memory space, it is called I/O memory. Even though I/O space is provided in x86 processors, we can design the circuit board to only involve the memory space. In this case, the CPU accesses the peripheral I/O port just like a memory unit, and no special I/O commands need to be set up.

IO space:IO space and memory are independent. They have their own bus, and the IO space is usually 64 KB. the IN and OUT commands are used to access the memory space: 4 gb in size, the two are very different.

IO port:Peripheral registers also become I/O ports, which usually include "control registers, status registers, and data registers". The peripheral registers are usually continuous addressing, however, different from the CPU core register, the peripheral register has an address. Different CPU chips have different bus connection methods, so there are different outgoing register addresses, after knowing the address, you can control the peripherals by assigning values to the Register address corresponding to the peripherals.

The CPU can address the physical IP address of an I/O port in two ways:It is also called Port ing. Another method is storage space ing, called memory ing.

CPU (Power PC, ARM, etc.) as part of the memory, registers participate in the unified addressing of the memory, through general memory instructions to access these peripheral registers, called IO memory

Another type of CPU (x86) regards these peripheral registers as an independent address space. Instructions for accessing the memory cannot use these peripheral registers, but special commands (IN, OUT command), called the IO port

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