Linux MTD source code analysis (Good News)

From: http://lansedefeng2005.blog.163.com/blog/static/3683192620071020935272/

Introduction to Linux MTD
Exclusive terms:
1. MTD: memory technology device, memory technology device,
2. JEDEC: Joint Electron Device Engineering couneller, electronic and electrical equipment Federation
3. CFI: Common flash interface, General flash interface, a flash interface standard initiated by Intel
4. OOB: out of band. Some memory technologies support out-of-band data. For example, each 512-byte block of NAND Flash has 16 bytes of extra data for error correction or metadata.
5. ECC: Error Correction. Some hardware not only allows access to flash, but also supports ECC. All flash devices are suffering from bit switching. In some cases, a bit may be reversed or reported to be reversed. If this bit is actually reversed, the ECC algorithm is used.
6. erasesize: The minimum block size that an erase command can erase
7. buswidth: The interface bus width of the MTD Device
8. interleave: staggered data. Several chips are connected to one chip in parallel to increase buswidth.
9. devicetype: chip type, X8, x16, or x32
10. NAND: A Flash technology. For more information, see comparison between NAND and nor.
11. Nor: A Flash technology. Refer to the comparison between NAND and nor.

Linux MTD introduction:
MTD (memory
Technology
Device memory technology device) is used to access the Linux subsystem of memory devices (ROM, flash. The main purpose of MTD is to drive the new memory device
It provides an abstract interface between the hardware and the upper layer. All source code of MTD is in the/Drivers/MTD subdirectory. I divide the MTD device of the CFI interface into four layers.
(From the device node to the underlying hardware driver), the four layers are: Device node, MTD device layer, MTD raw device layer, and hardware driver layer.

Root file system
File System
Character device Node
MTD character device
MTD block Device
MTD original device
Flash hardware driver
Block device Node

I,
Flash hardware driver layer: the hardware driver layer is responsible for driving flash hardware during init.
The nor flash chip driver of MTD follows the CFI interface standard. The driver is located in the drivers/MTD/chips subdirectory. NAND Flash Driver
The Order is in the/Drivers/MTD/NAND subdirectory.

2. MTD original device: the original device layer consists of two parts: the common code of the MTD original device and the data of each specific flash, such as partitioning.

The data structure used to describe the original MTD device is mtd_info, which defines a large amount of MTD data and operation functions. Mtd_table (mtdcore. c) is
There is a list of MTD raw devices. mtd_part (mtd_part.c) is the structure used to represent the MTD raw device partition, which contains mtd_info, because every partition has
Is regarded as an MTD original device added to mtd_table, most of the data in mtd_part.mtd_info is from the main partition mtd_part-
> Obtained from the master.

The drivers/MTD/maps/sub-directory stores specific flash data. Each file describes the flash on a board. Call
Add_mtd_device () and del_mtd_device () Create/Delete the mtd_info structure and add/Delete the mtd_table (or call
Add_mtd_partition () and del_mtd_partition () (mtdpart. c) Create/Delete the mtd_part structure and
Mtd_part.mtd_info ).

3. MTD device layer: based on the original MTD device,
In Linux, you can define MTD Block devices (primary device No. 31) and character devices (device No. 90 ). The MTD character device is defined in mtdchar. C. By registering a series
File Operation Function (lseek, open, close, read, write ). MTD Block devices define a structure that describes MTD Block devices.
Mtdblk_dev, and declares an array of pointers named mtdblks.
Mtd_info corresponds to each other.

4. device node: Use mknod to create MTD character device nodes (primary device Number 90) and MTD block device nodes (primary device number 31) in the/dev subdirectory ), you can access MTD character devices and Block devices by accessing this device node.

V,
Root file system: in bootloader, burn the jffs. Image (or jffs2.img) file system image of jffs (or jffs2.img) to a certain point in flash.
Partition, mount the partition as the root file system in the your_fixup function of the/ARCH/ARM/Mach-Your/arch. c file.

6. File System: After the kernel is started, the mount command can be used to mount the remaining partitions in flash as the file system to mountpoint.

Function call relationship between the device layer and the original device layer (we need to implement the red part ):
I
MTD raw devices can be divided into several MTD raw devices by mtd_part and registered into mtd_table. Each MTD raw device in mtd_table can be registered
One MTD device, wherein the main device Number of the character device is 90, and the secondary device number is 0, 2, 4, 6... (Read-only device for an odd number of times), the primary device for a block device is 31, and the secondary device is 0, 1,
2, 3...

Mtd_notifier

Character device mtd_fops block device mtd_fops

(Mtdchar. c) (mtdblock. c) mtdblks

Device layer
Register_mtd_user ()
Get_mtd_device ()
Unregister_mtd_user ()
Put_mtd_device ()
Erase_info
Mtd_notifiers
Mtd_table
Mtd_info
Mtd_part
(Mtdcore. c)
(Mtdpart. c)

Your flash
Your-flash.c)
Add_mtd_partitions ()
Del_mtd_partitions ()
Original device layer
Add_mtd_device ()
Del_mtd_device ()
Mtd_partition

Nor flash chip driver and MTD original device

All nor flash drive (PROBE) programs are placed under Drivers/MTD/chips. One MTD source device can be composed of one or several identical
Flash chip composition. Assume that four flash devices with devicetype X8 are used, each block is 8 Mb, interleave is 2, and the starting address is 0x01000000,
An original MTD device (0x0000000-0x03000000) is formed when the address is connected. The two interleave devices form a chip and the address is
0x0000000 to 0x02000000, the other two interleave into a chip, its address from 0x02000000 to 0x03000000.

Note that all flash chips that constitute an MTD must be of the same type (whether interleave or address connection ), the data structure of the MTD raw device only uses the same structure to describe its flash chip.
Zero X 03000000
Zero X 02000000
Zero X 01000000
Each
Both the original MTD devices have a mtd_info structure. The priv Pointer Points to a map_info structure, and the fldrv_priv in the map_info structure points to
Cfi_private structure. The cfiq pointer of the cfi_private structure points to a cfi_ident structure, and the chips Pointer Points to the number of flchip structures.
Group. The mtd_info, map_info, and cfi_private structures are used to describe the original MTD device. Because the nor flash is the same as the original MTD device,
The cfi_ident structure is used to describe the flash chip information, while the flchip structure is used to describe the proprietary information of each flash chip (such as the starting address)
Comparison between NAND and nor
　
Nor and NAND are two major non-loss flash technologies on the market. Intel first launched nor in 1988
Flash technology has completely changed the previous situation where EPROM and EEPROM were integrated. Next, in 1989, Toshiba published
The Flash structure emphasizes reducing the cost per bit and higher performance, and can be easily upgraded through interfaces like disks. However, after more than ten years, there are still a considerable number of hardware engineers who cannot tell nor
And nand flash memory.
Flash memory can often be used with nor memory. Many insiders do not know the advantages of NAND Flash compared with nor, because in most cases, Flash is only used to store a small amount of code, so nor flash is more suitable for some. Nand is an ideal solution for high data storage density.
　
Nor is characterized by in-chip execution (xip, execute in
Place), so that the application can run directly in flash memory, without having to read the code into the system Ram. Nor transmission efficiency is very high, in 1 ~ The small size of 4 MB is very high
This benefit, but the low write and erase speeds greatly affect its performance.
The NAND structure provides a very high unit density, achieves a high storage density, and writes and erases quickly. The difficulty of using NAND lies in Flash management and special system interfaces.

Performance Comparison
　
Flash flash memory is a non-loss-prone memory. It can be used to erase and re-program memory unit blocks called blocks. Write operations on any flash device can only be performed in an empty or erased unit. Therefore, most
In this case, you must erase the data before writing. It is very easy for the NAND device to perform the erasure operation, and nor requires that all the bits in the target block be written to 0 before the erasure.
Since the nor device is erased with 64 ~ For blocks of KB, the time for performing a write/erase operation is 5 S. In contrast, the erased NAND device is 8 ~ For 32 KB blocks, it takes up to 4 ms to perform the same operation.
When the block size is erased, the performance gap between nor and nadn is further extended. Statistics show that for a given set of write operations (especially when updating small files ), more erasure operations must be performed in the nor-based unit. In this way, when selecting a storage solution, the designer must weigh the following factors.
● Nor reads faster than NAND.
● NAND writes much faster than nor.
● NAND's 4 Ms erasure speed is far faster than nor's 5s.
● Most write operations require erasure first.
● NAND has fewer erased units and fewer erased circuits.

Interface differences
Nor Flash has an SRAM interface and enough address pins to address it, so it can easily access every byte in it.
Nand devices use complex I/O ports to access data in a serial manner. Different products or vendors may use different methods. Eight pins are used to transmit control, address, and data information.
Nand read and write operations use 512 bytes of blocks, which is a bit like hard disk management. Naturally, NAND-based memory can replace hard disks or other Block devices.

Capacity and cost
The unit size of NAND Flash is almost half the size of the nor device. Because the production process is simpler, the NAND structure can provide a higher capacity within the given mold size, thus reducing the price accordingly.
　
Nor flash occupies 1 ~ Most of the 16 MB flash memory market, while Nand
Flash is only used in 8 ~ Among the MB products, this also shows that the nor is mainly used in the code storage medium, and the NAND is suitable for data storage,
Secure Digital, PC cards, and MMC have the largest share in the memory card market.

Reliability and Durability
Reliability is an important issue to consider when using the flahs media. Flash is a suitable storage solution for systems that need to expand MTBF. The reliability of nor and NAND can be compared in terms of life (durability), bit switching and bad block processing.
Life (durability)
In nand flash memory, the maximum number of writes to each block is 1 million, while that of nor is 100,000. In addition to having a block erasure cycle of 10 to 1, the typical NAND block size is eight times smaller than that of the nor device, each NAND memory block is deleted less frequently within a given period of time.
Bit Switching
All flash devices are plagued by bit switching. In some cases (rarely, Nand occurs more often than nor), a bit is reversed or reported to be reversed.
One-bit changes may not be obvious, but if it occurs on a critical file, this small fault may cause system downtime. If there is only a report problem, it may be solved by reading multiple times.
Of course, if this bit changes, you must use the error detection/error correction (EDC/ECC) algorithm. The problem of bit inversion is more common in nand flash memory. The NAND supplier recommends using the EDC/ECC algorithm when using nand flash memory.
This problem is not fatal when using NAND to store multimedia information. Of course, if you use a local storage device to store operating systems, configuration files, or other sensitive information, you must use the EDC/ECC system to ensure reliability.
Bad Block Processing
Bad blocks in NAND devices are randomly distributed. I have tried to eliminate bad blocks before, but I found that the yield rate is too low, the cost is too high, and it is not cost-effective at all.
The NAND device needs to initialize the media to detect Bad blocks and mark them as unavailable. In an existing device, a high failure rate may occur if this processing is not performed in a reliable way.

Easy to use
The nor-based flash memory can be used very directly, and can be connected like other memory, and code can be directly run on it.
Due to the need for I/O interfaces, Nand is much more complicated. The access methods for various NAND devices vary from manufacturer to manufacturer.
When using the NAND device, you must first write the driver to continue other operations. Writing information to a NAND device requires considerable skill, because designers must not write information to Bad blocks, which means virtual ing must be performed from beginning to end on the NAND device.

Software Support
When discussing software support, we should distinguish basic read/write/erase operations from high-level software for disk simulation and flash management algorithms, including performance optimization.
Running code on the nor device does not require any software support. When performing the same operation on the NAND device, the driver is usually needed, that is, the memory technology driver (MTD ), the NAND and nor devices require MTD for write and erase operations.
　
When using the nor device, fewer MTDS are required. Many vendors provide more advanced software for the nor device, including the trueffs driver of M-system.
Wind River system, Microsoft, QNX software system, Symbian, Intel, and other vendors.
The driver is also used to simulate diskonchip products and manage nand flash memory, including error correction, Bad Block Processing, and loss balancing.

-- From m-System Company Arie tal