Linux Source read Note Jmpi instructions

Source: Internet
Author: User

Jmpi is an inter-segment jump instruction for x86 real mode,

such as: Bootseg = 0x0c70

Jmpi 4, #BOOTSEG

If the current segment cs==00h, then the execution of this instruction will jump to the segment Cs==0x0c70, of course, the value of CS is also changed to 0x0c70, followed by the instructions 0x0c70:0004 instructions.

Real-mode addressing is to be compatible with 8086 processors, 8086 is 16-bit CPU (the data width of the Alu), and 20-bit address bus addresses 1 m of memory space. Its addressing mode: segment base + offset, the segment base is stored in CS, DS, ES and other segments of the register, equivalent to the high 16-bit addressing, and the offset is the internal 16-bit bus provided, when sent to the external address bus, the segment base and offset composite 20-bit address, to address the physical space of 1M.

Composition: The segment base is shifted to the left by 4 bits, followed by an offset address. But it is not the general addition, because the add-in before the base address has shifted left 4 bits, becomes 20 bits (the lowest 4 bits is 0), and the offset is 16 bits, so, is actually the segment base and the offset of the high 12-bit addition, the offset of the low 4-bit unchanged.

such as: Segment base shift Left 4 bit after: 0x 8,880:0

Offset address (0x0440): + 0x 044 0

________________

External bus 20-bit address: 0X88C4 0

It can be seen that this so-called segment memory management, is not a purely base address plus offset way, it is said that Intel was deceived by the people. Here's what I saw in an article:

Addressing issues with 8086/8088
===============
8088 and 80286 are 16-bit cpu,intel. Why did you warn IBM and gates? What the hell is going on?
To understand what's going on, we'll look at the inside of the processor and see a huge difference. First, you find a piece of 8088CPU, the packaging is worn off, grinding to the CPU wafer, under the microscope, you will see 8086/88 of the internal structure, it is not a new design, but two parallel operation of the 8085 (8-bit) microprocessor a little more.
Each 8085 has its own 8-bit data and 16-bit addressing capability. It is easy to pretend that 16-bit registers are combined with 2 8-bit data registers. In fact, there's nothing new. The RCA COSMAC microprocessor uses 16 8-bit registers that can be used as internal 8-bit or 16-bit registers, and you can have up to 16 8-bit registers or 8 16-bit registers or any combination of both. Now, a common IC factory in China can be easily designed out.
Possibly due to the production process at the time limit, 8,088 can have 40 feet, Intel's design "Elite" wrestling, identified 20 address lines (1M of addressing space), and 16 data lines and 20 address line of 16 is multiplexed (time-sharing, that is, one will be the address line, one will be the data line, To understand this, you can see the 8088-chip Manual of the timing section, you can also see 8052 single-chip computer books, its address lines and data lines are also reused.
  
To the point of the matter, 8088 of the two 8085 each have a set of 16-bit addressing registers, how to let them address the 20-bit 1M addresses? Actually putting them together to form 32-bit addressing is very simple, and if so later a lot of trouble may not be (such as A20 Gate), but then those "elite" may think that 32-bit addressing (4G address space) that is nonsense, it is estimated that the earth will disappear and not use so much memory it? Besides, the boss was so tight that they used two 8085 very good implementations on one hardware--segment:
They divide the 1024K address space into 16-byte segments, a total of 64K segments, a 8085 16-bit addressing register for the address offset register (the length of the segment is 64K), and the other 8085 16-bit addressing register as the segment address register of the 16-byte segment, note that Instead of the address of the 16-byte segment, the ordinal number of the 16-byte segment (0,1, ...) is saved. 65535).
The advantage of this is that as long as a shifter and a 20-bit adder are added between the 8085CPU, 20-bit address addressing can be done-a 8085 address register (segment address-that is, the ordinal of a 16-byte segment) moves Left 4 bits (*16 = The first address of the 16-byte segment), Add another 8085 address register to it, haha! Can go to the boss, production cost is low, design speed, money not to rob is grandson! As for the future, ....

Linux Source read Note Jmpi instructions (GO)

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