Make and makefile in Linux

Make is a very important compilation command in both Linux and UNIX environments. Make or make install is often used for project development and application software installation. With the make tool, we can break down large development projects into multiple modules that are easier to manage. For an application that includes hundreds of source files, by using make and makefile, You can streamline the complex relationships between various source files. In addition, if so many source files need to be compiled by typing the GCC command every time, it would be a disaster for programmers. The Make tool can automatically complete compilation, and only compile the part that the programmer modified after the last compilation. Therefore, the effective use of make and makefile tools can greatly improve the efficiency of project development. After you have mastered make and makefile, you will not be overwhelmed by the application software in Linux.
Unfortunately, this powerful but extremely complex compilation tool is not described in detail in many books about Linux applications. Here I will introduce make and its description file makefile in detail.
　　Makefile
The most important and basic function of the make tool is to use the MAKEFILE file to describe the relationship between source programs and automatically maintain the compilation work. The MAKEFILE file needs to be compiled according to a certain syntax. The file must describe how to compile each source file and generate an executable file, and define the dependency between the source files. Makefile is a common method for many compilers-including compilers in Windows NT-to maintain compilation information. It is only possible for users to modify makefile files on a friendly interface in the integrated development environment.
In Unix systems, makefile is used as a makfile. If you want to use other files as makefile, you can use the make Command Option similar to the following to specify the MAKEFILE file:
$ Make-F makefile. Debug
For example, a program named prog consists of three C source files, filea. c. fileb. C and filec. C and library files are compiled and generated by ls. These three files also contain their own header files. h, B. H and C. h. Generally, the C compiler outputs three target files: filea. O, fileb. O, and filec. O. Assume that filea. C and fileb. C both need to declare that a file named defs is used, but filec. C does not. That is, such a statement exists in filea. C and fileb. C:
# Include "defs"
The following documents describe the relationships between these files:
---------------------------------------------------------
# It is a example for describing makefile
Prog: filea. O fileb. O filec. o
CC filea. O fileb. O filec. O-ls-O prog
Filea. O: filea. c a. H defs
CC-C filea. c
Fileb. O: fileb. c B. H defs
CC-C fileb. c
Filec. O: filec. C. H
CC-C filec. c
----------------------------------------------------------
This description file is a simple MAKEFILE file.
The preceding example shows the behavior comment line with the first character. The first non-annotation row specifies that the prog is generated by the three target files filea. O, fileb. O, and filec. o. The third line describes how to create an executable file from the file on which prog depends. The following lines 4, 6, and 8 specify three target files, as well as the. C and. H files they depend on, and defs files. Lines 5, 7, and 9 specify how to create a target from the file on which the target depends.
When filea. C or. if the H file is modified after compilation, the make tool can automatically recompile filea. o. If the filea. C and. H is not modified, and test. if O still exists, there is no need to re-compile it. This dependency is particularly important in the compilation of multi-source files. With this dependency definition, the make tool can avoid many unnecessary compilation tasks. Of course, the use of shell scripts can also achieve the effect of automatic compilation, but the shell script will compile all the source files, including those that do not need to be re-compiled, the Make tool can automatically determine which source file to compile based on the last Compilation Time of the target and the Update Time of the source file on which the target depends.
Makefile, as a description, generally includes the following content:
◆ Macro definition
◆ Dependency between source files
◆ Executable commands
Makefile allows you to use a simple macro to refer to the source file and its related compilation information. In Linux, macros are also called variables. When referencing a macro, you only need to add the $ symbol before the variable, but it is worth noting that if the length of the variable name exceeds one character, you must add parentheses () When referencing ().
The following are valid macro references:
$ (Cflags)
$2
$ Z
$ (Z)
The last two references are exactly the same.
Note that some macro pre-defined variables, in Unix systems, $ *, $ @, $? And $ 1zap
/Usr/bin/make-DP | grep-V time> 2zap
Diff 1zap 2zap
Rm 1zap 2zap
Lint: dosys. c donamc. c file. C main. c Misc. C version. c gram. c
$ (Lint) dosys. c donamc. c file. C main. c Misc. C version. c/
Gram. c
Rm gram. c
Arch:
Ar UV/sys/source/s2/make. A $ (files)
----------------------------------------------------------
Generally, the description file should define the command to be executed as above. After the make command is executed, the output result is:

$ Make
CC-C version. c
CC-C main. c
CC-C donamc. c
CC-C Misc. c
CC-C file. c
CC-C dosys. c
YACC gram. Y
Mv y. Tab. c gram. c
CC-C gram. c
CC version. O main. O donamc. O Misc. o file. O dosys. O gram. O/
-Ls-o make
13188 + 3348 + 3044 = 19580b = 046174b
The final numeric information is the output result of executing the "@ size make" command. The reason why only the output result does not have the corresponding command line is that the "@ size make" command starts with "@". This symbol does not allow printing the command line where the output is located.
The last several command lines in the description file are very useful in maintaining compilation information. The "print" command line is used to print the names of all files modified after the last "make print" command is executed. The system uses a 0-byte file named print to determine the specific time for executing the print command, while the macro $? Point to the file names of the files modified after the print file is changed. If you want to specify to run the print command and send the output results to a specified file, you can modify the macro definition of P:
Make print "P = cat> zap"
In Linux, most software provides source code rather than ready-made executable files. This requires you to configure and compile the source program based on your system's actual situation and requirements, software can be used. Only by mastering the make tool can we truly enjoy the free software world of Linux, which brings us endless pleasure.