SPI is a "serial peripheral Interface" abbreviation, is a four-wire synchronous serial communication interface, used to connect microcontrollers, sensors, storage devices, SPI equipment divided into the main equipment and two from the device, the four lines for communication and control are:
The CS chip chooses the signal SCK the clock signal MISO The main equipment The data input, from the device's data output foot Mosi the main device's data output, from the device's data input foot because in most cases, the CPU or SOC side is usually working in the main device mode, so the current Linux kernel version, the only real The main mode driver framework is now available.
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Hardware StructureTypically, the device responsible for signaling the clock is what we call the master device, and the other side as a device, and the following image is an example of a hardware connection to an SPI system:
Figure 1.1 SPI hardware structure as shown above, the main device corresponds to the SPI controller in the SOC chip, in general, there may be multiple SPI controllers in one SOC, as shown in the example above, there are 3 SPI controllers in the SOC chip. Each controller can be connected to multiple SPI from the device, each from the device has its own independent CS pin. Each 3 additional signal pins are shared from the device: SCK, MISO, Mosi. At any moment, only one CS pin is in a valid state, and the device connected to the active CS pin can communicate with the main device (SPI Controller) at this time, others are waiting from the device, and their 3 pins must be in a high resistance state.Work time seriesAccording to the phase relation between clock signal and data signal, SPI has 4 kinds of Working time series mode:
We use Cpol to indicate the state of the initial level of the clock signal, Cpol 0 indicates that the initial state of the clock signal is a low level, and 1 indicates that the initial level of the clock signal is a high level. In addition, we use Cpha to indicate that at that clock along the sampled data, Cpha 0 indicates that the first clock changes along the sampling data, while the Cpha 1 means to sample the data along the second clock change. The kernel uses a combination of Cpol and cpha to represent the working mode that the current SPI requires: Cpol=0,cpha=1 mode 0 cpol=0,cpha=1 mode 1 cpol=1,cpha=0 mode 2 cpol=1,cpha=1 Mode 3Software ArchitectureIn the kernel SPI-driven software architecture, a reasonable layering and abstraction is made, as shown in the following illustration:
Figure 2.1 SPI-driven software architectureSPI Controller DriverSPI Controller does not care about the specific functions of the device, it is only responsible for the upper-level protocol-driven data to the SPI bus timing requirements to send to the SPI device, while the data received from the device to the upper layer of the Protocol driver, therefore, the core of the SPI controller driver Independent. SPI Controller driver is responsible for the control of specific controller hardware, such as DMA and interrupt operations, and so on, because multiple upper layer of the Protocol driver may request data transfer operation through the controller, so the SPI controller driver is also responsible for the queue management of these requests, to ensure that FIFO principle.SPI General Interface package Layer
To simplify the programming of the SPI driver, and to reduce the coupling between the protocol driver and the controller driver, the kernel encapsulates some common operations of the Controller-driven and protocol-driven into a standard interface, plus some general logic processing operations, which form the SPI General interface package layer. The advantage is that for a controller driver, the standard interface callback API is implemented and registered to the common interface layer without the need for direct interaction with the protocol layer driver. For the protocol layer driver, the device and driver registration can be completed by the API provided by the common interface layer, and the data is transmitted through the API of the common interface layer, without paying attention to the implementation details of the SPI controller driver. SPI Protocol Driver above we mentioned that the controller driver is not clear and focus on the specific features of the device, the SPI device is the specific function of the SPI protocol driver, the SPI protocol driver to understand the capabilities of the device and Communication data protocol format. Down, the protocol driver swaps data through the common interface layer and controller, up, and the protocol driver typically interacts with the device's specific functionality and other subsystems of the kernel, such as interacting with the MTD layer to implement the SPI interface's storage device as a filesystem. Interacts with the TTY subsystem to implement the SPI device as a TTY device, interacting with the network subsystem to implement a SPI device as a network device, and so on. Of course, if it is a proprietary SPI device, we can also implement our own proprietary protocol driver according to the protocol requirements of the equipment. SPI Generic device drivers Sometimes, given the variability of the devices connected to the SPI controller, the kernel does not have a protocol driver in the kernel, in which case the core prepares a generic SPI device driver for us, The universal device driver provides control interface for controlling SPI control to user space, the specific protocol control and data transmission work to the user space according to the specific equipment to complete, in this way, only in a synchronous manner and SPI equipment communication, so it is usually used for some simple SPI device with less data.
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