SCM _ C language function _ interrupt function (Interrupt Service Program)

Before writing the interrupt function, let's review the Interrupt System of the single chip microcomputer.

The meaning of interruption (those who have learned the microcomputer principle and interface technology, but have never learned a single-chip microcomputer, we should also know). We will not talk about it here. First, let's recall what problems are involved in the interruption system.

(1) interrupt source: the source of the interrupt request signal. (8051 there are three internal interrupt sources T0, T1, serial ports, two external interrupt sources int0, int1 (these two low-level valid, the above horizontal bar does not know how to add ))

(2) interrupt response and return: the CPU collects the interrupt request signal, redirects to a specific interrupt service subprogram, and returns the interrupted program to continue execution after execution. During this period, the conditions for CPU response interruption, on-site protection, and on-site recovery are involved.

(3) Priority Control: interrupt priority control forms interrupt nesting (8051 allows two levels of Interrupt nesting, with the priority order int0, T0, int1, T1, and serial ports ), for interruptions with the same priority, priority levels still exist. Priority can be programmed, while priority is fixed.

The principle of 80C51 is ① same as priority. First, the response is high priority. ② low priority can be interrupted by higher priority. ③ ongoing interruptions cannot be interrupted by interrupt requests of the same level or low priority.

The 80C51 interrupt system involves interrupt requests, interrupt permits, and interrupt priority control.

(1) three internal interrupt sources: T0, T1, and serial port; two external interrupt sources: int0 and int1

(2) interrupt control registers: tcon (including T0, T1, int0, int1), serial control register scon, interrupt allow register IE, interrupt priority register IP

What is specific and what signs are included? I will not talk about them here. I will talk about them in all books.

Here we will talk about the precautions

(1) After the CPU response is interrupted, tf0 (T0 interrupt flag) and TF1 are automatically cleared by hardware.

(2) After the CPU response is interrupted, ie0 (External Interrupt int0 request flag) and ie1 are automatically cleared by hardware in the edge trigger mode. In the level trigger mode, ie0 and ie1 cannot be automatically identified. Therefore, the int0 and int1 pins must be removed from the low level before the interruption is returned. Otherwise, the CPU may respond multiple times when the interruption occurs.

(3) In a serial interrupt, after the CPU response is interrupted, Ti and RI (receiving the interrupt request flag) must be cleared by the software.

(4) After the single-chip microcomputer is reset, tcon and scon are reset.

The C51 language allows users to write interrupt service subprograms (interrupt functions) by themselves)

First, you can understand the program format:

Void function name () interrupt M [using N]

{}

The keyword interrupt M [using N] indicates that this is an interrupt function.

M is the number of the interrupt source. There are five interrupt sources, which are 0, 1, 2, 3, and 4. The interrupt number will tell the compiler the entry address of the program to interrupt. When the program is executed, this address will transmit a program counter PC, so the CPU starts to execute a program command from here.

N is the serial number of the MCU register group (also known as the General Register group). There are four groups in total. The values are 0, 1, 2, and 3.

Interrupt number Source
0 External Interrupt 0
1 timer 0
2 External Interrupt 1
3 timer 1 interrupt
4. Disconnection of serial ports

The interrupt entry addresses of these five interrupt sources are: (they are the first 43 storage units in ROM described in the previous article. These 40 addresses are used to store the address units of the interrupt handler, each interruption-like storage unit is only 8B. Obviously, it is not the interrupt processing program, but the real address of the interrupt processing program)

Int0: 0003 H 0

T0: 000bh 1

Int1: 0013 H 2

T1: 001bh 3

Serial Port: 0023 H 4

Interrupt vector (Interrupt entry address) = interrupt number X8 + 3

The preceding M indicates clearly that different m values indicate that this function is intended for different interrupt sources. For example, if M is 1, it indicates that it is an interrupt function of the timer 0,

For example, void time0 () interrupt 1 {}

So what does using N Mean? When a specific task is being executed, there are more urgent tasks that need to be handled by the CPU, involving the priority of interruption. High-priority interrupt low-priority program being processed, so it is best to assign different Register Groups to each priority program.

The CPU is processing an event. Suddenly another event needs to be processed, so after the interruption, you do not want to import the registers of the program currently executed into the stack, you can put the interrupt program into another register group, for example, switch to group 1, and switch back to group 0 after exiting the interrupt (the original program is in group 0 ).

To better understand the meaning, you can look at the role of the working register group.

The following notes are transferred from the articles of other friends on the Internet (after sorting out the articles, we have removed them and wrote them very well ):

(1) The interrupt function cannot pass parameters.
(2) The interrupt function does not return values.
(3) The interrupt function cannot be called directly under any circumstances.

(4) The interrupt function uses floating-point operations to save the status of the floating-point register.
(5) If other functions are called in the interrupt function, the registers used by the called function must be the same as the interrupt function. It is best to set the called function to reentrant.
(6) When compiling an interrupt function, the C51 compiler automatically adds the corresponding content at the beginning and end of the program, as follows: stack ACC, B, DPH, DPL, and psw at the beginning of the program. If the interrupt function does not contain the using N modifier, the R0 ~ R1 enters the stack and ends with the exit of the stack. If the interrupt function is added with the using N modifier, You need to modify the work register group selection bit in the psw after the psw is started into the stack.
(7) The C51 compiler generates an interrupt vector from the absolute address 8 m + 3, where M is the interrupt number, that is, the number following interrupt. This vector contains an absolute jump to the interrupt function entry address.
(8) It is best to write the interrupt function at the end of the file and disable the use of extern storage type description. Prevent other programs from being called.

(9) When designing the interrupt, pay attention to which functions should be placed in the interrupt program and which functions should be placed in the main program. In general, the service interruption program should do the minimum amount of work, which has many advantages. First, the system has a wider response to the interruption. If some systems lose or slow response to the interruption, it will have very serious consequences. At this time, it is very important to have enough time to wait for the interruption. Secondly, it makes the structure of the interrupted service program simple and not prone to errors. The more things put in the interrupt program, the more likely they are to conflict. Simplifying service interruption means there will be more code segments in the software, but you can put them in the main program. The design of the interrupt service program plays a vital role in the success or failure of the system. You must carefully consider the relationship between the interruptions and the execution time of each interruption, pay special attention to the ISR that operates on the same data.