The SPI-driven migration under Linux2.6.32 is shown in the following illustration:
the following needs to modify some of the kernel code, the following actions: 1. Modify the arch/arm/mach-s3c2440/mach-mini2440.c file
Add the following code after the include header file code line
SPI Add by Shiguang
#include <linux/spi/spi.h>
#include <mach/spi.h>
static struct Spi_board_info s3c2410_spi0_board[] = {
[0] = {
. Modalias = "Spidev",
. Bus_num = 0,
. Chip_select = 0,
. IRQ = Irq_eint9,
. max_speed_hz = 500*1000,
},
};
static struct S3c2410_spi_info S3c2410_spi0_platdata = {
. Pin_cs = S3C2410_GPG (2),
. Num_cs = 1,
. Bus_num = 0,
};
End Add SPI
Then add the following code at the beginning of the function __initmini2440_machine_init
SPI Add by Shiguang
s3c_device_spi0.dev.platform_data=&s3c2410_spi0_platdata;
Spi_register_board_info (S3c2410_spi0_board,array_size (S3c2410_spi0_board));
End SPI
Add at the end of the mini2440_devices array
&s3c_device_spi0,//Add by Shiguang
2. Modify the Drivers/spi/spi_s3c24xx.c file
Add the following code at the beginning of the file
Add by Shiguang
#include <mach/regs-gpio.h>
Add the following code at the end of the S3c24xx_spi_initialsetup function
Add by Shiguang
S3c2410_gpio_cfgpin (Hw->pdata->pin_cs,s3c2410_gpio_output);
S3c2410_gpio_cfgpin (0x8b, s3c2410_gpio_sfn2);
S3c2410_gpio_cfgpin (0x8c, s3c2410_gpio_sfn2);
S3c2410_gpio_cfgpin (0x8d, s3c2410_gpio_sfn2);
End Add 3. Finally recompile the kernel
Reboot mini2440 to view the device files under/dev
[Root@shiguang/]# Ls/dev/spidev0.0-l
CRW-RW----1 root 153, 0 out of 1 08:00/dev/spidev0.0
[Root@shiguang/]#
4. Application Testing The program is taken to the Linux source package under the/home/youshan/linux-2.6.32.2/documentation/spi/spidev_test.c, here I will paste it again. * * SPI Testing utility (using SPIDEV driver) * * Copyright (c) 2007 MontaVista, Inc., Copyright (c) Software 2007 Vorontsov <avorontsov@ru.mvista.com> * * * is free software; Can redistribute it and/or modify * it under the terms of the GNU general public License as published by * Ftware Foundation; Either version 2 of the License. * * Cross-compile with Cross-gcc-i/path/to/cross-kernel/include * * #include <stdint.h> #include <unistd.h> # Include <stdio.h> #include <stdlib.h> #include <getopt.h> #include <fcntl.h> #include <sys/ ioctl.h> #include <linux/types.h> #include <linux/spi/spidev.h> #define ARRAY_SIZE (a) (sizeof (a)/ sizeof ((a) [0])) static void Pabort (const char *s) {perror (s); abort ();} static const char *device = "/dev/spidev1.1"; static uint8_t mode; static uint8_t bits = 8; Static uint32_tSpeed = 500000; static uint16_t delay; static void transfer (int fd) {int ret; uint8_t tx[] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x40, 0x00, 0x00, 0x00, 0x00, 0x95, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0 Xad, 0xBE, 0xEF, 0xBA, 0xAD, 0xF0, 0x0D,}; uint8_t Rx[array_size (tx)] = {0,}; struct Spi_ioc_transfer tr = {. Tx_buf = (unsigned long) tx,. Rx_buf = (unsigned long) Rx,. len = Array_size (TX),. Delay_use CS = delay,. speed_hz = speed,. Bits_per_word = bits,}; RET = IOCTL (FD, Spi_ioc_message (1), &TR); if (ret = 1) pabort ("Can ' t send SPI message"); for (ret = 0; ret < array_size (TX); ret++) {if (!) ( Ret% 6)) puts (""); printf ("%.2x", Rx[ret]); Puts ("");} static void Print_usage (const char *prog) {printf ("Usage:%s [-dsbdlholc3]\n", prog); puts ("-D--device device to-use" efault/dev/spidev1.1) \ n "--speed Max speed (Hz) \ n" "-D--delay delay (USEC) \ n" ""---bpw bits per word \ n ""-L- Loop lOopback\n ""-H--cpha Clock phase\n ""-O--cpol clock polarity\n ""-l--lsb least significant bit first\n ""-C--cs-hi GH chip Select Active high\n "-3--3wire SI/SO signals shared\n"); Exit (1); static void parse_opts (int argc, char *argv[]) {while (1) {static const struct option lopts[] = {{"Device", 1, 0, ' D '}, {"Speed", 1, 0, ' s '}, {"Delay", 1, 0, ' d '}, {"BPW", 1, 0, ' B '}, {"Loop", 0, 0, ' l '}, {"Cpha", 0, 0, ' H '}, { "Cpol", 0, 0, ' O '}, {"LSB", 0, 0, ' L '}, {"Cs-high", 0, 0, ' C '}, {"3wire", 0, 0, ' 3 '}, {"No-cs", 0, 0, ' N '}, {"R Eady ", 0, 0, ' R '}, {NULL, 0, 0, 0},}; int C; c = Getopt_long (argc, argv, "D:s:d:b:lholc3nr", lopts, NULL); if (c = = 1) break; Switch (c) {case ' d ': device = optarg-break; case ' s ': Speed = atoi (optarg); break; case ' d ': delay = atoi (optarg); Brea K Case ' B ': bits = atoi (OPTARG); Break Case ' L ': Mode |= spi_loop; Break Case ' H ': Mode |= spi_cpha; Break Case ' O ': Mode |= Spi_cpol; Break Case ' L ': Mode |= spi_lsb_first; BrEak Case ' C ': Mode |= spi_cs_high; Break Case ' 3 ': Mode |= spi_3wire; Break Case ' N ': Mode |= spi_no_cs; Break Case ' R ': Mode |= spi_ready; Break Default:print_usage (Argv[0]); Break int main (int argc, char *argv[]) {int ret = 0; int fd; Parse_opts (argc, argv); fd = open (device, O_RDWR); if (FD &L T 0) Pabort ("Can ' t open device"); * * SPI mode/ret = IOCTL (FD, Spi_ioc_wr_mode, &mode); if (ret = = 1) pabort ("Can ' t set SPI mode"); RET = IOCTL (FD, Spi_ioc_rd_mode, &mode); if (ret = = 1) pabort ("Can ' t get SPI mode"); * * bits per word */ret = IOCTL (FD, Spi_ioc_wr_bits_per_word, &bits); if (ret = = 1) pabort ("can ' t set bits per word"); RET = IOCTL (FD, Spi_ioc_rd_bits_per_word, &bits); if (ret = = 1) pabort ("can ' t get bits per word"); /* Max speed Hz */ret = IOCTL (FD, Spi_ioc_wr_max_speed_hz, &speed); if (ret = = 1) pabort ("Can ' t set max speed Hz"); RET = IOCTL (FD, Spi_ioc_rd_max_speed_hz, &speed); if (ret = = 1) pabort ("Can ' t get max speed Hz");printf ("SPI mode:%d\n", mode); printf ("bits per word:%d\n", bits); printf ("Max speed:%d Hz (%d KHz) \ n", speed, speed/1000); Transfer (FD); Close (FD); return ret; You can receive data only by mini2440 the SPI Rx and TX short. The results are shown in the following illustration:
Test completed. Over.