Jflash source code analysis

Source: Internet
Author: User

It is often a problem with the board, it is helpless, often to give the Board signal to use ADS to write a long program (I use ARM)
I often see errors in the Jflash program and only know how to restart the board, so I often want to read the Jflash source code
Today, I finally began to sacrifice Source Insight, build a project, and read Jflash.
The so-called 7-inch snake, read the program first read the main
I will start to dissect jflash from main.
The code I read is in the windows version and compiled with VC. I think the Linux version should be similar, that is, to define a macro. This issue is not a concern for the time being. First, focus on the program itself.
At the beginning of the program, there are a lot of variables without comments. Maybe I am not easy to learn. I just can't understand the usage of those variables. Skip it for now. Let's look at the subsequent programs first.
# Ifdef _ windows __
// Test operating system, if WinNT or Win2000 then get device driver handle
OSVERSIONINFO osvi;
Osvi. dwOSVersionInfoSize = sizeof (OSVERSIONINFO );
GetVersionEx (& osvi );
If (osvi. dwPlatformId = VER_PLATFORM_WIN32_NT)
{
HANDLE h;

H = CreateFile ("\. \ giveio", GENERIC_READ, 0, NULL,
OPEN_EXISTING, FILE_ATTRIBUTE_NORMAL, NULL );
If (h = INVALID_HANDLE_VALUE)
Error_out ("Couldn't access giveio device ");
CloseHandle (h );
}
# Endif
The copyright information is not mentioned. The following is to check whether giveio has been installed.
If not, the system prompts Couldn 'taccess giveio device
Call the test_port () function to find a parallel port that can be used.
Before analyzing test_port (), we will first introduce parallel programming first.
Our PC generally has three parallel ports, and their IO address ranges are usually:
0x3bc-0x3be
0x378-0x37a
0x278-0x27a
In many computers, the joint port connecting to the Jtag is usually based on 0x378.
We can see that a parallel port has three IO addresses, the first is the data register address, the second is the control register address, and the third is the Status Register address. Jflash Code does not set the parallel port. It is estimated that the SPP (standard parallel port) mode is used. In this mode, writing data to the data register address can output data to the outside, the control register can also output signals to the outside, while the Status Register can return status signals from 5 places high to low, where the highest bit is opposite to the signal logic, this is confusing to me, but people say this is the case. That is the case.
Next let's look at the test_port () code.
Nt test_port (void)
{
// Search for valid parallel port

If (io_access_on (LPT1 )){
_ Outp (LPT1, 0x55 );
If (int) _ Indium (LPT1) = 0x55)
{
# Ifdef DEBUG
Printf ("Parallel Com port found at I/O address: % Xn", LPT1 );
# Endif
Return LPT1;
}

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