C Compiler anatomy _6.3.6 assembly code Generation _ "Fetch address" generating assembly instructions

6.3.6 Generating assembly instructions for "fetch address"

In this section, let's discuss the translation of the following two intermediate directives:

(1) Take address order <ADDR,DST,SRC1,NULL>

For example <addr,t0, number, null>, representing the address of number and saving to the temporary variable t0

(2) Object Clear 0 Directive < clr,dst,src1,null>

For example <clr,arr,16,null>, which indicates that Arr occupies 16 bytes of memory zeroed

Let's take an example to illustrate that for the initialization of the local array of arr in the 4th row of the figure 6.3.14, we can zero out the array of arr by 16 bytes of memory by the CLR intermediate instruction on line 11th, and then assign the value to arr[0 by the MOV instruction in line 12th. Line 21st to 26th is the assembly code corresponding to the CLR directive, and we call the library function memset in the assembly to implement the object zeroing operation. And for Line 5th, "PTR1 = &num1;" , we can take the address of NUM1 by the Addr intermediate instruction in line 13th, save in the temporary variable t0, and then assign the PTR1 by the MOV instruction on line 14th. Line 28th "Leal Num1,%eax" is the assembly code corresponding to the addr directive.

Figure 6.3.14 Example of address and object zeroing

The intermediate instruction related to the Fetch Address directive also has the DEREF directive of line 17th and the Imov instruction of line 18th, which we have described in the previous chapters for the translation of these two intermediate directives. With these two intermediate instructions, we can implement the C Statement of line 7th "*PTR1 = *ptr2;" The semantics that are required.

Next, let's look at the function emitaddress and function emitclear,6.3.15 used to generate the corresponding assembly code. Line 5th calls the Allocatereg function to allocate a register for the temporary variable DST in the addr directive, the 7th line generates the assembly instruction to load the SRC1 address into the DST corresponding register, and the 8th line calls Modifyvar to set the temporary variable DST write-back flag, which means " Its value in memory "and" the value in the register "has not been consistent.

6.3.15 emitaddress () and Emitclear ()

Figure 6.3.15 Line 10th to 35th is used to generate assembly code for CLR directives, when the size of the object to be zeroed is {1,2,4} bytes, we can generate a MOV assembly instruction on line 15th to 22nd to achieve zero, otherwise we will generate the assembly code through the 32nd line, In which the Memset function is called to implement the object zeroing. Since register EAX is used in the assembly instruction template x86_clear, we need to call the Spillreg function on line 28th to write back the register EAX.

At this point, we have completed the work of generating assembly code for each intermediate instruction.

Finally, let's take a look at the compile function, 6.3.16, this is our roadmap from the beginning of the 3rd chapter, we have gone through the stages of "parsing", "Semantic checking", "intermediate Code Generation and optimization" and "assembly code generation".

Figure 6.3.16 Compile ()

C Compiler anatomy _6.3.6 assembly code Generation _ "Fetch address" generating assembly instructions