Computer composition principle-Command System

Operation Code Field

Address Code Field

Chapter 4 Command System

4.1 knowledge points Scanning

4.1.1 command formats 2-4-1

1. Basic Instruction format

An instruction is a machine language statement. It is a group of meaningful binary code. The basic format of the instruction is 2-4-1.

The operation code specifies the operation nature and function of the instruction, and the address code provides the address of the operand.

The address in the address code can be the address of the primary storage, the address of the Register (number), or even the address of the I/O device.

For a dual-operand operation instruction, the address of the operand, the address of the result, and the address of the next instruction can be clearly given in the instruction, which is called an explicit address; it can also be given with an implicit address according to some prior agreement, called a hidden address. The numbers of explicit addresses include three and two-address commands (General Register commands), one-address commands (accumulative computers), and zero-address commands (stack computers ).

2. fixed-length operation code Command Format

The fixed length operation code is called regular encoding, which is the simplest encoding method. The number and position of the operation code field are fixed. To indicate all commands in the system, the operation code field of the command should have enough digits.

Assume that the command system has a total of M commands, and the number of digits in the command operation code field is n digits, the following relationship should be applied:

So .

Fixed Length Encoding is very advantageous for simplifying the hardware design and reducing the Instruction Decoding time.

3. Extended operation code Instruction format

The extended operation code is called non-regular encoding. The number of digits of the operation code field is not fixed and distributed to different positions of the script. This method can effectively compress the average length of the operation code field in the command. Obviously, the bit and position of the operation code field are not fixed, which will increase the difficulty of Instruction Decoding and analysis, and complicate the design of the controller.

The typical extended operation code Code shortens the operation code field of the command (three-address instruction) with a large number of operands and the command (one or zero-address instruction) with a small number of operands) the operation code field is longer, so that each field of the command can be fully utilized, and the number of digits of the operation code can be expanded without increasing the length of the command, so that it can represent more commands.

4.1.2 addressing method of commands

1. Concept of valid addresses

Generally, the address given by the address code field in the instruction is called the form address (represented by a), which cannot be used directly to access the primary storage. The address that can directly access the primary storage obtained by performing some operation is called a valid address (indicated by the letter EA ).

2. Data addressing and command addressing

Addressing can be divided into data addressing and command addressing. The address of the next instruction to be executed is called the instruction addressing, and the addressing of the operand is called the data addressing. Command addressing is simple and can be divided into sequential addressing and hop addressing. There are many data addressing methods, and the ultimate goal is to find the required operands.

Sequence addressing can automatically form the address of the next instruction by adding 1 to the program counter. Skip building requires implementation by program transfer class instruction.

3. Common addressing methods

(1) Addressing now

Immediate addressing is a special addressing method. The part behind the operation code field in the instruction is not the operand address in the general sense, but the operand itself.

(2) Register addressing

The address code section of the register addressing instruction provides the id ri of a general register, which contains the operands. Valid address: Ea = Ri. This method can shorten the instruction length and speed up instruction execution.

(3) direct addressing

The address a given by the address code field in the instruction is the valid address of the operand, that is, the formal address is equal to the valid address: Ea =. Since the given operand address cannot be modified and is irrelevant to the location of the program, it is also called absolute addressing.

(4) Indirect addressing

Indirect addressing means that the address a given in the instruction is not the address of the operand, but the address of the primary storage unit that stores the address of the operand, that is, the address of the operand address, that is, EA = (). Indirect addressing commands need to be accessed multiple times during the execution phase, which can expand the addressing scope and facilitate programming.

(5) Register indirect addressing

The address code in the indirect addressing instruction in the register gives the number of a general register, and stores the valid address of the operand in the specified register. Ea = (RI ), the operands are stored in the primary storage unit. In this way, commands are short, and the operands can be obtained only once after the finger is retrieved. Therefore, the speed of command execution is faster than that of indirect addressing.

(6) Address Change Addressing

Address Change Addressing is to add the content of the address change register rx to the form address agiven in the instruction to form the valid address of the operand, that is, EA = (RX) +. The content of Rx is called the address change value.

(7) base address addressing

Base Address addressing is to add the content of the base address register RB to the displacement d given in the instruction to form the valid address of the operand, that is, EA = (RB) + d. The content of Rb is called the base address value.

(8) Relative addressing

Relative addressing is a kind of flexibility in base addressing. The program counter (PC) provides the base address, and the address code field in the instruction serves as the displacement d. After the two are added, the valid address of the operand is obtained, that is, EA = (PC) + d. The displacement indicates the relative position between the operand and the current command.

(9) page addressing

The valid address of the memory is divided into two parts: the front part is the page address, and the back part is the page address. The on-page address is automatically provided by the instruction address code. It can obtain a valid address through simple assembly connection with the page address without computation, so addressing is fast. Based on the source of the page address, page addressing can be divided into three different ways.

① Base page addressing, also known as zero page addressing. Because the page addresses are all equal to 0, the valid address Ea = 0 //. Base page addressing is actually direct addressing.

② Addressing the current page. The page address is equal to the content of the high part of the program counter (PC). Therefore, the valid address Ea = (PC) h // A. the operand S is on the same page as the instruction itself.

Page 3 Register address. The page address is taken from the page register and spliced with the form address to form a valid address.

(10) stack addressing

A stack is a storage area that is accessed in a specific order. This specific order can be attributed to "last-in-first-out (LIFO)" or "last-out (FILO )".

A register stack consists of a set of specialized registers, also known as a hard stack. The stack top of this stack is fixed, and the registers in the register group are connected to each other, so they have the function of automatically moving the corresponding bit, the content of a register can be moved to another adjacent register.

A stack composed of a block of primary storage is called a soft stack. The size of the soft stack is variable, the stack bottom is fixed, and the stack top is floating. Therefore, a dedicated hardware register is needed as the top of the stack, stack pointer (SP ).

If the bottom address of a soft stack is greater than the top address of the stack, and the stack pointer always points to the full unit at the top of the stack, perform the following operations on the stack:

(SP)-1 → SP modify the stack pointer

(A) → (a) Push the content in a to the top unit of the stack.

Operation during stack export:

(SP) → A pushes the content of the top unit of the stack to

(SP) + 1 → SP modify the stack pointer

The above 10 addressing methods are commonly used by computers. They can be used independently or combined, such as indirect addressing and base addressing after the address change, but not every computer uses all addressing methods.

4.1.3
Basic concepts of CISC and RISC

There are two different directions for the development of the command system. One is to enhance the functions of the original commands and set more complex new commands to harden the functions of the software; the other is to reduce various types of commands and simplify command functions, and improve the speed of command execution. The former is called a complex command system, and the latter is called a simplified command system.

A computer based on a complex command system is called a complex command system computer (CISC). A computer based on a simplified command system is called a simplified Command System Computer (RISC ).

The central idea of the balanced architecture is that the command system should be simplified, and the Register operation commands should be used as much as possible. Besides the memory access commands (load and store), the operations of other commands should be completed within a single cycle, command formats are consistent, addressing methods are minimized, compilation efficiency is improved, and machine processing speed is accelerated. Table 2-4-1 lists the differences between CISC and RISC.

Table 2-4-1 what is the difference between CISC

	CISC	Proteus
Command System	Complex and huge	Simple and streamlined
Number of commands	Generally more than 200	Generally less than 100
Instruction Length	Not fixed	Equal length
Addressing Mode	Generally greater than 4	Generally less than 4
Accessible commands	Unlimited	Only load/store commands
Command Execution time	Large difference	Most of them are completed in one cycle
Number of General registers	Relatively small	Multiple
Control Mode	Mostly for microprogram Control	The vast majority are hard wiring control