Computer composition principle-Reading Notes (6) Bus System

A digital computer room consists of several system components which work together to form a complete computer system.

 

Bus: a public channel for data transmission between multiple functional components of a computer system.

With the help of bus connection, the computer implements address, data, and control information exchange between functional components of each system, and works on the basis of competition for resources.

 

Bus Type:

Internal Bus: the CPU is connected to the bus between registers and memory components.

System Bus: External Bus. Bus connecting CPU and other high-speed functional components in computer systems

I/O Bus: The bus connecting medium and low speed I/O devices

 

Bus standard: PCI, Isa

 

Adapter (Interface): enables matching and synchronization between high-speed CPU and low-speed peripherals, and transfers and controls all data between computers and peripherals.

 

Bus connection mode:

Single Bus: a single system bus is used to connect CPU, memory, and I/O devices.

Multi-Bus: Multiple bus are used for interconnection between CPU, Master memory, and I/O

 

High-speed CPU Bus: used between CPU and Cache

System Bus: The primary storage is connected to it.

High-speed bus: It can be connected to the LAN, video interface, graphic interface, SCSI interface, and FireWire interface.

The high-speed bus is connected to the extended bus through the extended bus interface. The extended bus can be connected to I/O devices working in serial mode.

The bridge CPU bus, system bus, and high-speed bus are connected to each other.

A bridge is a logical circuit with buffering, conversion, and control functions.

The multi-bus structure reflects that high-speed, medium-speed, and low-speed devices connect to different bus at the same time to improve bus efficiency and throughput, and changes in the processor structure do not affect the high-speed bus.

 

The bus structure of the Pentium machine:

 

The internal structure of the bus includes:

Data transmission bus (composed of address lines, data lines, and control lines)

Arbitration Bus

Interrupt and synchronization Bus

Public line (power supply, ground line, clock, reset, and other signal lines)

 

Three methods of information transmission in computer systems:

Serial Transmission: uses a transmission line and pulse transmission.

Parallel Transmission: each data bit requires a transmission line, which generally uses potential transmission.

Time-sharing transfer: Bus multiplexing or shared bus components use the bus at time.

 

I/O interface: it is a logical component connecting the CPU and the main memory and peripherals through the bus. Various peripheral devices must be connected to the bus through the I/O interface

 

Bus Arbitration:

The function modules connected to the bus are active and passive. The master can start a bus cycle, while the slave can always respond to the master request.

Each bus operation can have only one master, but multiple slaves.

Bus Arbitration components must be set up to solve the main line of contention for each function module.

 

Arbitration methods include:

Centralized Arbitration: the arbitration method must have a central arbitration server which accepts bus requests from all functional modules and adopts the principle of priority or fairness.

Distributed arbitration: distributed arbitration does not require a Central Arbitration device. Each function module has its own arbitration number and arbitration device.

 

Bus timing:

In order to synchronize the operations of the master and slave, a timing agreement must be formulated. Generally, the following rules are used:

Synchronous timing: In the synchronous timing protocol, the time when an event occurs on the bus is determined by the bus clock signal. The length of the bus cycle is fixed.

Asynchronous timing: In the asynchronous timing protocol, the time that appears on the bus later depends on the occurrence of the previous event, that is, based on the response or interlock mechanism, unified Public clock signals are not required.

 

PCI bus is a high-bandwidth Standard Bus unrelated to processors and an important hierarchical bus. It adopts the synchronous timing protocol and centralized arbitration policy, and has automatic configuration capabilities. Suitable for low-cost small systems.

The InfiniBand standard, based on the switch architecture, targets the latest I/O specifications in the high-end server market. Suitable for large-scale computer systems with high costs.

Computer composition principle-Reading Notes (6) Bus System