Computer Architecture: operator + controller =cpu Central processing Unit
An operator: An adder that can only do binary calculations, arithmetic and logic operations, such as subtraction, shift
Controller: Controls the coordination of the operator and memory AC, accepts control instructions, indicates how the operator is operating, indicates that the data access location is stored in the memory
Memory: Address the storage device,8 bits A byte, storing data and instructions, can not save data, instructions, just when the power is empty inside
I/O devices (input and Output): Hard disk, network card, the worst performance, input and output devices for people to deal with computers, hard disk also belongs to a input
Relationship: The controller coordinates which data in the memory cell is read to the operator.
All types of buses on the motherboard provide five-part cable access
Bus BUS: Data, control signal transmission
1. Address bus: Addressing
2. Control Bus
3. Data bus
4. line multiplexing: Addend, by Addend (data), instructions can be transmitted on this line
Cpu each pin represents a function (operation mode)
The CPU instruction set specifies what the 1 and 0 pieces of patchwork mean, and how the hardware should perform
CPU Clock frequency:Ghz 4Ghz represents a maximum of 1 seconds change of more than hundreds of billions of times, transmission of more than hundreds of billions of data, through the transistor oscillation switch closed open to create 0 and 1
Cache: high-speed memory, can copy some of the common data from memory, directly to the CPU, also used to coordinate hard disk and memory CPU Rate difference , connect CPU and memory (memory speed can not keep up with CPU, need to cache) level, level Two, level three, the smaller the number and the smaller the CPU speed difference, prefetching mechanism, follow the spatial locality and time locality, the cache cost is high
Register: CPU To temporarily store incoming data, let CPU have memory function
Interruption: The CPU uses the interrupt controller to determine and differentiate which input is, and the peripheral device interacts with the CPU only by interruption.
when you hit the keyboard, the keyboard will send an interrupt signal to the CPU, tell the CPU keyboard What happened, to see
Programmable Interrupt Controller: each of the above lines indicates that multiple devices are connected by vectors
Tip: More interrupts can also affect CPU performance
4G of memory requires a binary digital encoding, because 2 of the third party is 4G, so the three-bit computer bus address 4G memory, Because only the three - root bus, each line only represents 0 and 1 is 4G 4G
ROM: Read-only memory for computer-specific instructions that can be mapped into memory because RAM does not have power-saving functionality. These instructions can tell the computer to detect input, etc., for post power-on self-test
Front-end bus ( FSB):
North Bridge: High-speed bus controller, requires large amount of data, high frequency switching (link CPU and memory)
Now generally high-speed input (such as solid-state drives directly to the North Bridge, faster. away from The CPU is near, tells the bus controller ---- realizes the data exchange quickly
South Bridge : Low Speed Bus Controller --- connect various peripherals, hard disk, keyboard, mouse, connect to North Bridge via bus
How to make your system faster: SSDs are directly connected to the North Bridge
virtual machines: Hardware + software to emulate hardware functions
CPU Virtualization: Cutting the CPU into a time slice
memory Virtual: Linear address space ---= each process itself thinks it has 3G of memory (and 1G to the kernel), in fact not
Virtual machine Memory: Virtual memory is already virtual, physical address space virtual is linear address space
Kernel kernel Features:
Process Management
Memory management
File system
Network functions
Hardware Drivers
Security mechanisms
API (Library): An environment in which high-level languages interact with computers The library is called before it can be executed. compatibility layer between hardware and programming languages, enabling multiple languages to run on multiple hardware platforms
Libraries: a bunch of programs, no execution portals, can be executed by other program calls, cannot be executed independently
Combine the underlying system calls into a more advanced interface that facilitates the handling of programs and hardware, and some common programs that are used by all programs
Library calls: Encapsulating system calls
Liberal call
Kernel call
System call(kernel receives requests from other programs)
malloc (), free () two system calls requesting memory and freeing memory
Pos:portable Operating System POSIX
a rule ----- Portable Operating system specification, programs written on different platforms can be compatible with each other
compiling compilation links Execution
Assembly: Assembly Language Conversion to computer-aware binary code
Compiling: The process of converting other languages to assembly language
Windows Shared library:. dll file dynamic-link library
Linux Libraries:. So file share objects, a library who can use, greatly conserve resources
NUMA: Non-conforming memory access, each CPU has its own proprietary memory space, but requires process and CPU bindings.
program run: Apply to the kernel to occupy CPU Execution Instructions
once compiled, the program will only run on a specific platform, but Java is not the case
whether the application can run also depends on which schema is supported Cpu
API: Pre-compilation
ABI: Post-compilation
CPU Architecture Type:
x86
x64
Arm
m68000,m68k
Power
Powerpc
UltraSPARC
Alpha
Itanium
This article is from the "After Tomorrow" blog, please be sure to keep this source http://leeyan.blog.51cto.com/8379003/1758253
Computer Hardware Basics Learning Notes