Instruction Set
Y86 Instruction Set
Operator: addl, subl, andl, and xorl
Jump character: JMP, jle, JL, je, JNE, jge, andjg
Condition characters: cmovle, cmovl, cmove, cmovne, cmovge, and cmovg
Others: Call, pushl, popl, halt
Registers
% Eax, % ECx, % edX, % EBX, % ESI, % EDI, % ESP, % EBP
The stack pointer has % ESP.
The address where the PC stores the current command
Condition code (Status Code)
1. Normal Command Execution
2. Pending
3. invalid read/write address
4. Invalid Command
Instruction Encoding
Instruction Set encoding: registers are encoded before the assembly instruction set is executed:
For example, addl % ESI % eax will be encoded as addl 6 0
Logic Control (execution)
ALU
Clocked register
Loading of clock signal storage registers.
Random Access Memory
1. Register File (Register)
Register read/write
2. Virtual Memory (memory)
Instruction Processing
Instruction processing is divided into five stages: Fetch, decode, execute, write memory, and PC update.
Instruction processing process:
Fetch-> Decode-> execute-> write back-> PC Update (point to next instruction address)
Instruction processing ing Processing
CPU clock rotation pulling, encoding, processing each instruction, write back the next instruction address:
Computer science-Chapter 4 CPU Instruction Set and instruction Processing