Deep understanding of computer systems--memory addressing (i)--storage management mechanism (virtual address, linear address, physical address)

Source: Internet
Author: User

Reference
"Deep understanding of computer systems"
Deep understanding of the Linux kernel
"80x86 assembly Language Programming"
"The design and implementation of the operating system"

In order to protect the program and data in memory and share hardware support, in order to provide hardware support for realizing virtual memory, modern CPU not only uses the extended memory segment management mechanism , but also provides optional memory paging management mechanism. Physical addresses (physical address)

Cell addressing at the memory chip level, corresponding to the address bus for processor and CPU connections.

This concept should be one of the best understood in these concepts, it is worth mentioning, though, that the physical address can be directly interpreted into the machine on the memory itself, the memory as a large array from 0 bytes to the maximum number of bytes per byte, and then the array called the physical address, but in fact, This is just a hardware-provided image of the software, and memory is not addressed in this way.

So, say it is "with address bus select、read", is more appropriate, but aside from the physical memory addressing mode of consideration, directly to the physical address and physical memory one by one corresponding, is acceptable. Perhaps the mistaken understanding is more conducive to the metaphysical image. segmented mechanisms and logical addresses (logical address)

Intel retains the memory management of ancient times in order to be compatible.

A logical address is an address in a machine language instruction that specifies an operand or an instruction.

In Intel middle management, the logical address requirement, "a logical address is a segment identifier plus an offset of the relative address within a specified segment, expressed as [segment identifier: offset within paragraph]

Segmented methods are used to allocate and manage virtual storage. The address space of a task is divided into segments, and each paragraph has its own segment name and segment size. Each address space used by the task is abstracted as a segment base: Segment offset format, which greatly facilitates the programming and debugging of the program.
Segment-type management is the memory management mode under the x86 architecture, which continues to the present. x86 architecture is the main manufacturer of Intel, Granville Sheng AMD. Is the processor that is used by the PC running Windows XP.

The operating system has real mode and protection mode, such as the previous use of SCM that is real mode, the application address is the actual physical address, addressing space is limited. The protection mode can be extended to the 4G virtual address, so the operating system is now running in protected mode.

In a system under the x86 architecture, you must first convert the logical address of the segment management to a virtual address, and then convert the virtual address to a physical address (if paging management is turned on). However, the ARM architecture is not segmented, so the virtual address is converted to physical address directly. paging mechanisms and linear addresses (linear address)

The linear address, or also called the virtual address, is similar to the logical address, and it is also an linear address if the logical address is the corresponding hardware platform segment management conversion before the address, Then the linear address corresponds to the hardware page memory before the conversion address.

Use the paging method to allocate and manage the actual save. That is, the entire main memory is divided into equal size storage blocks, can be loaded on any one page of the job.
When memory is allocated, the operating system loads several pages in the process into several physical blocks that can not be contiguous, in blocks.

"Page", we call it the physical page, or the page frame, the page frames. It is the paging unit that divides all physical memory into fixed-length management units, and its length is typically one by one corresponding to the memory page.
1, paging Unit, the page directory is unique, its address placed in the CPU CR3 register, is the beginning of address translation. The long march began to grow.
2, each of the activities of the process, because there is a separate corresponding virtual memory (page directory is also unique), then it also corresponds to a separate page directory address. --run a process that needs to place its page directory address in the CR3 register and save the other.
3, each 32-bit linear address is divided into three parts, the Surface directory index (10 bits): Page table index (10 bit): offset (12 bit)
The conversion is based on the following steps:
1, remove the process from the CR3 page directory address (operating system is responsible for the scheduling process, the address loaded into the corresponding registers);
2, according to the linear address of the top ten, in the array, find the corresponding index entries, because the introduction of the level two management mode, the page directory of items, is no longer the address of the page, but a page table address. (another array is introduced), and the address of the page is placed in the page table.
3, according to the middle 10 of the linear address, in the page table (also array) to find the starting address of the page;
4. Add the starting address of the page to the last 12 digits of the linear address and get the gourd we want eventually; address space and address translation

Virtual memory consists of a variable size storage block (segment). Real-mode directly from the segment base: Segment offset to get the virtual address. In protected mode, the CPU uses data called segment descriptors to describe the address, size, and attribute information and usage of the segment. The address (logical address) of the virtual memory consists of the segment selector indicating the descriptor and the offset in the segment, which is synthesized into the virtual address space.

For example, with this conversion, 80386 of supported virtual controls reach 64T bytes. The storage address space that programmers use when writing programs is the virtual address space. So we can think of 64T of storage space to use.

Obviously, only the physical memory of the program can be executed, and only the physical memory of the data can be accessed. Therefore, the virtual address space must be mapped to the physical address space, and the two-dimensional virtual must be converted to a one-dimensional physical address. And because the physical address space is much less than the virtual address space. So only parts of the virtual address space can be mapped to the physical address space. Because the physical memory size is much smaller than the physical address space, only the parts of the above section can be truly mapped to physical memory.

Each task has a virtual address space. In order to avoid multiple virtual address spaces of multiple parallel tasks mapping directly to the same physical address space, the linear address space is used to isolate the virtual address space and the physical address space.
The linear address space is composed of one-dimensional linear addresses, and the linear address space and the physical address space are equivalent.

So the address in a virtual memory space is converted to a physical address. Two steps are needed: first, a logical address is given, and the CPU uses its segment memory snap-in to convert a logical address into a thread address and then use its page memory snap-in to convert to the final physical address.

The mapping of virtual address to linear address is realized by using the description chart and descriptor and the segmented management mechanism. The two-dimensional virtual address is transformed into one-dimensional linear address. This step is always there.

The paging management mechanism divides the linear address space and the physical address space into blocks of the same size, which are called pages. Through the mapping table established between the pages in the linear address space and the pages in the physical address space, the paging management mechanism realizes the mapping of the linear address space to the physical address space, and realizes the conversion of the linear address to the physical address. The paging management mechanism is optional, when the paging management mechanism is not adopted, the linear address space is directly equivalent to the physical address space, and the linear address is directly equal to the physical address.

The variable size blocks used by the segmented management mechanism make the segmented management mechanism more suitable for the logical segmentation of complex systems. The size of the storage block can be defined according to the appropriate logical meaning, without regard to the human limitations imposed by the resizable page. Each segment can be handled as a separate unit to simplify protection and sharing of segments. A fixed size block used by the paging mechanism is best suited for managing physical storage. Both the management memory and the external storage are equally effective, the paging management mechanism can effectively support virtual memory (virtual RAM).

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