Armeabi armeabi-v7a mips x86 understanding, armeabiarmeabi-v7a
Introduction
Armeabi, armeabi-v7a, mips, x86 how to understand?
ABI: indicates the instruction set based on which the application is compiled. ABI has four types: armeabi, armeabi-v7a, mips, and x86, which indicate the cpu type.
Armeabi default options,
Supports ARM * v5TE-based devices
Supports soft floating-point operations (hardware-assisted floating-point computing is not supported)
Supports all ARM * Devices
Armeabi-v7a supports ARM * v7 based devices
Support Hardware FPU commands
Supports hardware floating point operations
X86 IA-32 Instruction Set supporting hardware-based floating point operations
Mips supports binary Interfaces
Since armeabi is common, why other instruction sets? A: Although armeabi is versatile, it is slow, and v7a can fully utilize the v7a CPU capabilities. Armeabi is intended for general or old armcpu and armeabi-v7a for arm CPUs with floating point operations or advanced scalability. The same is true for x86 and mips.
Extended knowledge
EABI (binary interface for Embedded applications) Embedded application binary interface (binary interface for Embedded applications) describes the connection between the target code, the library target code, executable file images, and how to connect, execution and debugging, as well as the target code generation process, and the c, c ++ language interface specifications are the basic specifications for compiling connection tools and the basis for studying their working principles, unfortunately, arm's EABI has not been fully set so far. As part of EABI, there are process calling specifications, executable file format specifications, c/c ++ ABI specifications, and debugging format specifications. This is a new method of calling the system.
NEON is a 64/128-bit hybrid SIMD architecture developed by ARM to Improve the Performance of multimedia and signal processing applications. NEON is implemented as part of the processor, but it has its own execution pipeline and registers different from ARM. Key features include alignment and non-alignment data access, support for integer and single-precision floating point data types, tight coupling with ARM core, and large register files with multiple views.
SSE
Extends the SIMD stream command to Intel architecture (IA) (Intel's NEON-like tool ).
