Computer composition principle-Reading Notes (8) Input and Output System

There are many types of peripherals, and the transmission rate varies greatly. High-speed CPU synchronization with these devices:

Scheduled when data is transferred between the CPU and peripherals.

Extremely slow or simple peripherals

The CPU only needs to accept or send data.

Devices with low or medium speed

Asynchronous timing

Advanced peripherals

Synchronous timing

 

The CPU manages peripheral devices in the following ways: Program query, program interruption, DMA, and channel.

 

Interrupt: the CPU temporarily suspends the current program, forwards it to handle random emergencies, and automatically returns the functions and technologies of the original program after processing. The Interrupt System is the software and hardware term for implementing the interrupt function of the computer. Generally, the interrupt mechanism is set in the CPU, the interrupt controller is set in the peripheral interface, and the corresponding interrupt service program is set in the software.

 

The following functions interrupt the system:

Implement concurrent operations on hosts and peripherals

Troubleshooting

Implement time-based operations for multiple programs

Real-time Control

Achieve man-machine contact

Implement multi-host communication

 

Interrupt source: events that can interrupt requests to the CPU

 

Concepts and functions of interruptions:

 

Program query method: it is the easiest way for the CPU to manage I/O devices. The CPU regularly executes the device service program to take the initiative to understand the working status of the device. This method wastes valuable CPU resources.

 

Program interruption: a data exchange method widely used in various computers. When the data of a peripheral is ready, it "actively" sends a request signal to the CPU. After the CPU responds to the interrupt request, it suspends the main program and automatically transfers it to the interrupt service subroutine of the device to serve the device. The main program is returned at the end. Interrupt processing can be nested. Devices with higher priority can interrupt services with lower priority.

 

DMA mode: Direct Memory Access (Direct Memory Address) is set to exchange batch data between primary memory I/O devices at a high speed.

The idea is: hardware control is used to achieve direct data transmission between the primary storage and the I/O device, without CPU intervention during the transmission process. Data transmission is performed under the control of the DMA controller.

Three methods are available: Stop CPU access, periodic misappropriation, and exchange of DMA and CPU access

 

Channel Mode: It is a special function processor. It has its own commands and programs responsible for transmission control of data input and output, so that the CPU can delegate the "Transmission Control" function to the channel, and the CPU is only responsible for the "data processing" function.

After the CPU starts the channel, the channel automatically fetches the channel command from the memory and executes the command until the data exchange process ends and sends an interrupt request to the CPU.

 

Input/Output Modes of peripheral devices:

Computer composition principle-Reading Notes (8) Input and Output System