Freescale R10 IPU lib analysis-ipu_common.c

Source: Internet
Author: User
Ipu_common.c

 

The common ipu api implementation mainly provides IPU channel control functions for mxc v4l2 and IPU device drivers.

 

110 static inline int _ ipu_is_ic_chan (uint32_t dma_chan)

111 {

112 return (dma_chan> = 11) & (dma_chan <= 22) & (dma_chan! = 17) & (dma_chan! = 18 ));

113}

 

 

126 static inline int _ ipu_is_irt_chan (uint32_t dma_chan)

127 {

128 return (dma_chan> = 45) & (dma_chan <= 50 ));

129}

Channel 45-47 bmem-> IRT, channel 48-50 irt-> bmem

 

136 static inline int _ ipu_is_smfc_chan (uint32_t dma_chan)

137 {

138 return (dma_chan> = 0) & (dma_chan <= 3 ));

139}

DMA channel is an smfc channel. See MX51 datasheet 42.4.2.1. 0, 1, 2, 3 reach mem through smfc.

The data obtained from the CSI capture is not processed and then stored in mem. (I am wondering that the channel itself has the interlaced function. This is not a problem)

In fact, this channel can be used for de-interlaced. Of course, this de-interlaced is only a simple de-interlaced method. In some cases, the top bottom field shooting time varies greatly) i'm curious about how VDI solves the motion scene de-interlaced problem.

 

461 int32_t ipu_init_channel (ipu_channel_t channel, ipu_channel_params_t * Params)
462 {
463 int ret = 0;
464 uin32_t ipu_conf;
465 uint32_t reg;
466 unsigned long lock_flags;
467
468 dev_dbg (g_ipu_dev, "init channel = % d/N", ipu_chan_id (Channel ));
469
470/* re-enable error interrupts every time a channel is initialized */
471 _ raw_writel (0 xffffffff, ipu_int_ctrl (5 ));
472 _ raw_writel (0 xffffffff, ipu_int_ctrl (6 ));
473 _ raw_writel (0 xffffffff, ipu_int_ctrl (9 ));
474 _ raw_writel (0 xffffffff, ipu_int_ctrl (10 ));
475
476 if (g_ipu_clk_enabled = false ){
477 stop_dvfs_per ();
478 g_ipu_clk_enabled = true;
479 clk_enable (g_ipu_clk );
480}
481
482 spin_lock_irqsave (& ipu_lock, lock_flags );
483
484 if (g_channel_init_mask & (1l <ipu_chan_id (Channel ))){
485 dev_err (g_ipu_dev, "Warning: channel already initialized % d/N ",
486 ipu_chan_id (Channel ));
487}
488
489 ipu_conf = _ raw_readl (ipu_conf );
490
491 switch (Channel ){
492 case csi_mem0:
493 case csi_mem1:
494 case csi_mem2:
495 case csi_mem3:
496 if (Params-> csi_mem.csi> 1 ){
497 ret =-einval;
498 goto err;
499}
500
501 if (Params-> csi_mem.interlaced)
502 g_chan_is_interlaced [channel_2_dma (channel,
503 ipu_output_buffer)] = true;
504 else
505 g_chan_is_interlaced [channel_2_dma (channel,
506 ipu_output_buffer)] = false;
507
508 ipu_smfc_use_count +++;
509 g_ipu_csi_channel [Params-> csi_mem.csi] = channel;
510
511/* smfc setting */
512 if (Params-> csi_mem.mii_en ){
513 ipu_conf | = (1 <(ipu_conf_csi0_data_source_offset +
514 Params-> csi_mem.csi ));
515 _ ipu_smfc_init (Channel, Params-> csi_mem.mipi_id,
516 Params-> csi_mem.csi );
517} else {
518 ipu_conf & = ~ (1 <(ipu_conf_csi0_data_source_offset +
519 Params-> csi_mem.csi ));
520 _ ipu_smfc_init (Channel, 0, Params-> csi_mem.csi );
521}
522
523/* CSI data (include Compander) DEST */
524 _ ipu_csi_init (Channel, Params-> csi_mem.csi );
525 break;

 

501 caller should set csi_mem according to the data format passed in by sensor. If the data is split, set g_chan_is_interlaced. This flag will call _ ipu_ch_param_set_interlaced_scan for this channel.

524 call _ ipu_csi_init to set the direction of CSI data. In the current scenario, CSI data flows to imdac through smfc.

 

526 case csi_prp_enc_mem:
527 if (Params-> csi_prp_enc_mem.csi> 1 ){
528 ret =-einval;
529 goto err;
530}
531 if (using_ic_dirct_ch = mem_vdi_prp_vf_mem ){
532 ret =-einval;
533 goto err;
534}
535 using_ic_dirct_ch = csi_prp_enc_mem;
536
537 ipu_ic_use_count ++;
538 g_ipu_csi_channel [Params-> csi_prp_enc_mem.csi] = channel;
539
540/* Without smfc, CSI only support parallel data source */
541 ipu_conf & = ~ (1 <(ipu_conf_csi0_data_source_offset +
542 Params-> csi_prp_enc_mem.csi ));
543
544/* csi0/1 feed into IC */
545 ipu_conf & = ~ Ipu_conf_ic_input;
546 if (Params-> csi_prp_enc_mem.csi)
547 ipu_conf | = ipu_conf_csi_sel;
548 else
549 ipu_conf & = ~ Ipu_conf_csi_sel;
550
551/* upa skip buffer in memory, only valid when rws_en is true */
552 Reg = _ raw_readl (ipu_fs_proc_flow1 );
553 _ raw_writel (REG &~ Fs_enc_in_valid, ipu_fs_proc_flow1 );
554
555/* CSI data (include Compander) DEST */
556 _ ipu_csi_init (Channel, Params-> csi_prp_enc_mem.csi );
557 _ ipu_ic_init_prpenc (Params, true );
558 break;

 

540 ~ 542 set the data source to parallel

544 ~ 549 set CSI select bit for ipu_conf, this bit select manually between 2 CSIs, valid only when ic_input bit is cleared

Row 553 does not know why

Row 556 sets the data flow direction of the CSI sensor.

Row 557 sets the resize register ic_conf_enc_rsc, sets the CSC (color space convert) Register, and sets...

 

 

 

 

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