[I²c] I²c Bus Protocol diagram

Transferred from: http://blog.csdn.net/w89436838/article/details/38660631

1 I²c Bus physical topological structure

The I²c bus is very simple in physical connection, consisting of SDA (serial data line) and SCL (serial clock line) and pull-up resistor respectively. The principle of communication is to generate the signals required by the I²c-Bus protocol to transmit the data by controlling the order of the SCL and SDA lines at high and low levels. in the bus idle state, these two lines are generally pulled up by the pull-up resistor above, maintaining a high level .

2 I²c Bus Features

Each device on an I²C bus can be used as a master or slave device, and each device corresponds to a unique address (the address is physically grounded or pulled high, which can be learned from the data sheet of the I²C device, such as the TVP5158 chip, 7-bit address bit6~bit0:x101 1xxx, the lowest three bits can be equipped with, if all physical ground, the device address is 0x58, and the reason 7bit because 1 bit to represent the direction, the main to and from the main, the master and slave devices through this address to determine which device to communicate with, In the usual application, we use the CPU with the I²c Bus interface module as the main device , the other devices that are hooked up on the bus as slave devices.
The number of devices that can be hooked up on an i²c bus is limited by the maximum capacitance of the bus 400pF, and is also limited by the device address bit if the same type of device is hooked up.
I²C bus data transmission rate in the Standard mode up to 100kbit/s, fast mode up to 400kbit/s, high-speed mode up to 3.4mbit/s. Usually through the I²c bus interface programmable clock to achieve the transfer rate adjustment, but also with the resistance of the pull-up resistor connected.
The primary device on the I²C bus and the data transfer in bytes (8 bits) between the devices.

3 I²c Bus Protocol

The I²C protocol stipulates that the transmission of data on the bus must take a starting signal as a starting condition, with an end signal as the stopping condition of the transmission. The start and end signals are always generated by the main device ( meaning that slave devices cannot actively communicate?). All communication is initiated by the main device, and the master can issue the command of the query and wait for communication from the device.

start and end signal generation conditions : When the bus is idle, the SCL and SDA remain high, and when the SCL is high and the SDA jumps from high to low, a starting condition is generated, and when the SCL is high and SDA is low to high, a stop condition is generated.

After the starting condition is generated, the bus is busy, the master-slave device of this data transmission is exclusive, the other I²C devices cannot access the bus, and after the stop condition is generated, the master-slave device of this data transmission will release the bus and the bus is idle again. Start and end :

After understanding the starting and stopping conditions, let's take a look at how the data is transmitted in this process. As we mentioned earlier, the data transfer is in bytes. When the main device generates each clock pulse on the SCL line, a data bit is transmitted on the SDA line, and when a byte is transmitted from high to low in the order of the data bits, then the SDA line is pulled down from the device and passed back to the main device as an answer bit . At this point it is considered that a byte is actually transferred. Of course, not all byte transmissions must have an answer bit, for example: When the data sent from the main device is no longer received from the device, a negative answer bit is returned from the device. the process of data transfer :

In the previous we also mentioned that each device on the I²C bus corresponds to a unique address, the data transfer between the master and slave devices is based on the address, that is, the main device before transmitting valid data must first specify the address from the device , The process specified by the address is the same as the process of data transmission above, except that most of the device's address is 7 bits, and then the protocol specifies to add a minimum bit to the address to indicate the direction of the next data transfer, 0 indicates that the primary device writes data to the slave device, and 1 indicates that the primary device reads data from the device. format for sending data to a specified device : (each minimum packet data consists of 9bit, 8bit content +1bit ACK, 8bit contains 1bit direction if address data)

4 I²c Bus operation

The operation of the I²c bus is actually the read and write operation between the master and slave devices. It can be broadly divided into the following three operating conditions :

• The main device writes data from the device. The data transfer format is as follows:

• The master device reads data from the device. The data transfer format is as follows:

• The primary device writes data from the device, then restarts the starting condition, and then reads the data from the device, or the primary device reads the data from the device and restarts the starting condition, followed by the primary device writing data from the device. The data transfer format is as follows:

The third operation in a single master device system, the repetition of the start condition mechanism is more efficient than stopping the transmission after stop and then turning on the bus again.

[I²c] I²c Bus Protocol diagram