A Free Trial That Lets You Build Big!
Start building with 50+ products and up to 12 months usage for Elastic Compute Service
|[Date: 2008-7-30]||Source: China Power Grid Author: Lu Min, Chen Wei, Zheng lingxiang, Wu zhixiong||[Font:Large Medium Small]|
System on Programmable Chip is a special embedded System. First, it is a SoC system, that is, a chip is used to complete the main logic functions of the system. Second, it is a programmable on-chip system, configuration, reduction, scalability, and upgrade with hardware system programmability. The system adopts the design of the system-based network interface (RTL) to provide great flexibility. It Can Customize various hardware modules as needed, including the processor, bus, storage and communication modules. This makes it possible to build an on-demand SoC system on a single chip. The Linux system is also widely used in various embedded systems due to its excellent scalability and configurable features. The Linux operating system provides many system-level applications, for example, network protocol implementation, process scheduling, and memory management. At the same time, Linux is a mature open-source operating system with rich application resources. With these resources and powerful system functions, users can quickly develop embedded systems for complex applications based on embedded Linux. Therefore, combined with the advantages of the system, the system can meet the requirements of embedded systems and remove redundancy. This article provides a Linux-based development method for the system and a specific embedded application development example.
1. hardware development environment
1.1 Development Platform
The development platform used in this paper is the VIRTEX-II PRO FF1152 Development Board produced by AVNET Company, it uses XILINX's Virtex-II Pro FPGA chip XC2VP50-6FF1152C, at the same time, the Development Board also has 2 8 Mb × 32 SDRAM memory, 2 RS232 interfaces, an Ethernet interface, 1 LCD display, 8 LED lights, it also supports 16-bit high-speed LVDS interface of SPI-4.2, iSFP GbE optical fiber interface, System ACE interface and one P160 standard extension module .
1.2 PowerPC-based on-chip system
The XC2VP50-6FF1152C chip contains two IBM PowerPC 405 cores. PowerPC405 is a 32-bit Proteus processor, which is integrated into XILINX's Virtex-II Pro FPGA device in the form of an IP implantation architecture.
PowerPC hard core has many advantages suitable for software development and design : with three Timers: that is, programmable internal timers, fixed internal timers and watchdog timers, flexible storage management, and multiplication and accumulation commands used to enhance computing functions. The power of PowerPC can meet the processing capability and computing speed requirements of many complex application systems. At the same time, the dual-core mechanism and the process scheduling of the operating system can greatly improve the processing speed.
With EDK software developed by XILINX, you can easily build your desired hardware system on Virtex-II Pro chips. For the processor, you can choose Hard Core IP: PPC405, or soft Core IP: microblze. The bus can be OPB or PLB bus. At the same time, you can choose a wide range of peripheral IP addresses; in terms of communication, there are communication modules that support both high speed and low speed. High-Speed IP addresses include plb_etherne, opb_ethernet, opb_ethernetlite, and plb_gemac. Low-speed IP addresses include opb_iic, opb_spi, opb_uart16550, and opb_uartlite, optional IP addresses include opb_sdram, opb_ddr, opb_emc, opb_sysace, plb_sdram, plb_ddr, and plb_emc. Other IP modules support functions such as interrupt, timing, GPIO, and PCI. A wide range of IP modules, coupled with the use of IPIC (IP Interconnect) to connect to a custom IP address, so users do not need to use another SDRAM Controller Chip when using the CPU, alternatively, it is extremely convenient to use an Ethernet control chip.
The programmable on-chip system is composed of processor, BUS Interconnect, and peripheral devices. The typical on-chip system architecture 1 based on PowerPC is shown in.
1.3 CoreConnect bus structure 
Bus interconnection is a key technology in On-Chip Systems. The system adopts the CoreConnect bus structure. This bus structure is a type of on-chip communication bus interconnection technology developed by IBM. Its application makes it easier to reuse and connect the system core, peripheral core, and processor core. Here, the system core is for the functional IP module on the PLB bus, and the peripheral core is for the functional module on the OPB bus. CoreConnect Bus Interconnect is composed of the local logical Bus PLB (Peripheral Logic Bus), The On-chip Peripheral Bus OPB (On chip Peripheral Bus), a Bus bridge, and two judges, and Device Control bus DCR (consisting of Device Control Register, its structure 2 is shown.
2. Build a Linux-based system
The construction of the system includes the establishment of the hardware platform and the transplantation of the Linux operating system. First, the project requirements are analyzed to determine the hardware IP core required by the system, and then the hardware platform is built. After the hardware platform is built, EDK software is used to generate relevant hardware parameter files and device driver files. You need to use the generated file to build the Linux kernel. At the same time, you need to build the root file system for the kernel. Finally, you need to develop the required functional application interface based on the constructed operating system. The construction of the root file system should consider the services and functions provided in the kernel and the system commands required by the application. The application functions to be implemented also affect the selection of kernel services and functions. Root file systems, application interfaces, and kernels are mutually affected. The specific building flowchart 3 is shown.
2.1 use EDK to build a hardware system
The hardware system is built using edk8.2, because the CPU, ram, and bus are required in the Linux-based operating system design. Because the Bram in the chip is only kb/s, the. ELF File for downloading the Linux kernel is generally much larger than this capacity, so an external storage unit is required. This article uses the opb_sdram storage control module to implement this function. This article uses the uart16550 control module to conveniently observe the test results through the RS232 port. To meet the needs of this application, you can use the uartlite module to implement the communication between the RS232 com2 port and external devices. Add the IP module of ethernet_mac to connect the development board to the network using the Ethernet port. To facilitate debugging, you can add the gpio module. Control LED lights by gpio to display the system status. If you select Application initialization hardware, when the BIT data is downloaded to the FPGA system for normal operation, you can see that the LED light is lit. In addition, you can mount custom IP addresses to meet specific requirements.
When selecting a parameter, you can use the default value, while the memory parameter can select a larger capacity. The PowerPC 405 hard core is used. The running frequency of PPC is set to 100 MHz. The reference clock and the bus frequency of the system are also set to 100 MHz; the Ibram and dbram rates of the Bram module are set to 64kb/s respectively. The customized hardware system of the system is shown in Figure 4.
2.2 build a Linux system on the System
After the hardware system of the system is built, use the board-level support package (BSP) generated by the EDK software to configure and compile the kernel. BSP contains the attribute file of the selected processor architecture and the driver source file of the related hardware. Add these files to the Linux kernel, configure the kernel options to select the corresponding processor architecture, the driver module of the Selected hardware, and other required kernel modules, and then compile the configured kernel, generate the Linux kernel image file.
After generating the kernel image file, you also need to generate the root file system required for system operation. The root file system contains all the applications, libraries, and system configurations of the embedded Linux system. Common Programs and commands in the root file system can be constructed using the open source software Busybox. After the construction is complete, the directory tree of the root file system is constructed based on the directories and files generated by Busybox, and related device files and configuration files are added as well as the script files required for system running, to form the final root file system. Now, you can compile the file system into the kernel as an image, or use the NFS file system to load the root file system over the network.
3. Application Example
Taking the development of a multi-process embedded Web server for remote device control as an example, this paper describes the process of developing applications on the Linux-based systems based on the Linux system. Embedded Web Server development includes HTTP protocol Reduction and Specific application implementation. Users can send CGI requests to the Web server so that the server can communicate with external devices through the serial port to achieve remote control.
3.1 HTTP Protocol reduction
Embedded Web servers are designed based on the HTTP protocol, while HTTP is implemented based on the TCP/IP protocol stack. In the Linux kernel, the complete implementation of the TCP/IP protocol stack is included, which provides a good foundation for the implementation of Embedded Web servers. Compared with the Implementation of Web servers on the system without operating system environment, the development based on Linux can save a lot of work.
HTTP is an object-oriented protocol at the application layer. It adopts a simple and fast method and is suitable for Distributed hypermedia information systems . Embedded Web servers implement different functions based on different needs. Compared with the complete Web server, the functions to be implemented are much simpler . The embedded Web server in this article only implements the most common part of the Protocol. Considering the storage space and processing capability of the embedded system, the HTTP protocol is reduced. This not only improves the efficiency of Web servers, but also reduces the occupied space, which is of positive significance.
When the client is connected to the Web server, the client first establishes a connection with the server through SOCKET, and then initiates a request to the server. The request information includes the file name and client information to be returned. The client sends the information to the server in the form of a request header (including the HTTP method and header field [6. HTTP methods are commonly used in GET, HEAD, and POST. Therefore, this article uses GET, HEAD, and POST methods.
The HTTP header fields include general-header, request-header, response-header, and entity-header. in each field, multiple types  are defined. most of them are not commonly used, so you should select several types as needed. The Server designed in this article supports the following header types: Date, Host, Server, Accept, Connection, Content-Type, Content-Length, Accept-Charset, and Accept-Language.
When the server receives a request, it immediately explains the method used in the request and starts processing. After processing, it sends a response message. The response message contains the status code, header fields, and entity information (that is, the resource content on the server requested by the customer). The HTTP protocol also has four status codes: . These status codes detail the server status, error information, and user instructions. Because the Embedded Web Server only needs to provide services to users and does not need to provide users with specific status feedback, this article only retains specific error information, while omitting most of the status information.
3.2 multi-process embedded Web server implementation
The design of this system reduces the HTTP protocol, and then uses the process scheduling and network communication functions provided by Linux (including SOCKET and TCP connections ), A multi-process Web server is compiled in C language. The implemented Web server receives client requests, selects to send files to communicate with external devices through the serial port as needed, and sends the results returned by external devices to the client. The function description is as follows: Listen to the user's HTTP request on the specified port, analyze and interpret the request, and perform corresponding operations; return the requested content or error information to the user in the form of an HTTP response. User requests are divided into CGI requests and non-CGI requests. If they are CGI requests, first check whether the user's permissions and files exist, and then create a new process, in the sub-process, the sub-process communicates with external devices through the serial port, and finally sends the results or error messages returned by the serial port to the Web server to return to the user. If the request is not a CGI request, only the permission and file check are performed. If the check succeeds, the file is sent; otherwise, an error message is displayed. 5.
This article describes how to develop Linux-based systems based on embedded Web servers. This design is fast and simple. It is based on the Linux operating system to ensure the system stability. At the same time, the process scheduling function of the system is used to speed up information processing. The combination of the system and the embedded Linux operating system not only meets the requirements of embedded applications customized and tailored on demand, but also can develop a stable and powerful embedded system. In the context of increasingly complex embedded applications, this has a very meaningful and good application prospects.
 AVNET. Virtex-II Pro FF1152 development board user's guide. https://www.em.avnet.com. 2005.
 Dong daijie. FPGA-based Programmable SoC design. Beijing: Beijing University of Aeronautics and Astronautics Press, 2006.
 IBM. Core connect bus architecture.Http://www-03.ibm.com/chips/products/coreconnect/. 2004.
 douglas e c. use TCP/IP for Internet connection (Volume 1): Principles, protocols and structures. Version 4. Lin Yao, translated. Beijing: Electronic Industry Press, 2001.
 Liu dianmin, Li kejie. Design and Implementation of Linux-based embedded HTTP network server [J]. Computer Engineering, 2004, (23): 193-195.
 fielding r, gettys j, mogul j, et al. RFC2616: Hypertext transfer protocol -- HTTP/1.1. The Internet Engineering Task Force, June 1999.
Start building with 50+ products and up to 12 months usage for Elastic Compute Service