Linux Interrupt processing Flow-interrupt vector table jump jump to C__linux

turn from: http://blog.csdn.net/coldsnow33/article/details/12917759Reference: http://lwn.net/Articles/302043/
an interrupted processing process1 The CPU executes the exception vector VECTOR_IRQ code when the interrupt occurs.
2 inside the VERTOR_IRQ, the total entry function Asm_do_irq of the interrupt processing is eventually invoked.
3 ASM_DO_IRQ calls the HANDLE_IRQ in the Irq_desc array entry based on the interrupt number.
4 HANDLE_IRQ uses functions in the chip member to set up the hardware, such as removing interrupts, prohibiting interruptions, restarting interrupts, and so on.
5 HANDLE_IRQ invokes a handler function (for a shared interrupt) that the user registers in the action list individually.
Now the kernel interrupt entry function ASM_DO_IRQ can also be changed to its own definition. two interrupt system tieringIt's good to see other people layering like this.
1 Arch Package hardware layer related to interrupt vector and interrupt mark;
2 The flow control layer controlled by various triggering modes and response modes;
3 Switch Interrupt, interrupt the package logic layer;
4 leaves the drive layer of the driver programming interface.
three interrupt vector table 1 anomaly Vector tableARCH/ARM/KERNEL/ENTRY-ARMV. An anomaly vector table is preserved between _vectors_start and __vectors_end in S. [CPP]  View Plain Copy     .equ    stubs_offset, __vectors_start  + 0x200 - __stubs_start          .globl   __vectors_start   __vectors_start:    arm (   swi SYS_ERROR0   )     thumb ( svc  #0       )     thumb (  nop         )        w (b)      vector_und + stubs_offset       w (LDR)   pc,  . lcvswi + stubs_offset       w (b)     vector_pabt  + stubs_offset       w (b)     vector_dabt +  stubs_offset       w (b)     vector_addrexcptn +  stubs_offset       w (b)     vector_irq + stubs_offset        w (b)     vector_fiq + stubs_offset           .globl  __vectors_end   __vectors_end:    ARM 8 Exception vectors and 7 mode of operation are not one by one corresponding, but associated. Vector 0 is reset, if the CPU is running to the vector 0 indicates that the system error, with software interrupt sys_error0 to deal with, Vector 2 is also jump to soft interrupt, soft interrupt will fall into the SVC mode. Vectors 3 and 4 all fall into ABT mode. What is SVC mode. What is abt mode. 2 arm working mode7 Modes of operation are: 1 user mode (USR): The execution state of the normal program; 2 Fast interrupt mode (FIQ); 3 interrupt mode (IRQ); 4 Management Mode (SVC): Superuser, one protection mode of the operating system; 5 system mode (SYS): Run privilege level system task; 6 data access termination mode (ABT): Data or instruction prefetch, 7 undefined directive termination mode (und): Execution of undefined directives. In addition to user mode, the remaining 6 are privileged modes, and the remaining 5 of the privileged mode, except for system mode, are called exception modes. Where are these patterns defined? In the program State Register CPSR, there is also a SPSR is its backup, called the Backup program State registers, they are in the same format. The CPSR format is as follows:

The M[4:0]5 bit is used to determine the processor mode, Bit[4] indicates 26bit, or 32bit addressing, with a low 4bit to distinguish mode, so that each processor can define 16 modes. The code for the PSR bits definition is in arch/arm/include/uapi/asm/ptrace.h. [CPP]  View plain copy #define  USR26_MODE  0x00000000   #define  FIQ26_MODE   0x00000001   #define  IRQ26_MODE  0x00000002   #define  svc26_mode   0x00000003   #define  USR_MODE    0x00000010   #define  FIQ_MODE    0x00000011   #define  IRQ_MODE     0x00000012   #define  SVC_MODE    0x00000013   #define  abt_mode     0x00000017   #define  HYP_MODE    0x0000001a    #define  UND_MODE    0x0000001b   #define  SYSTEM_MODE  0x0000001f   #define  MODE32_BIT  0x00000010   #define  MODE_MASK    0x0000001f   #define  PSR_T_BIT   0x00000020   #define   Psr_f_bit   0x00000040   #define  PSR_I_BIT   0x00000080   #define  psr_a _bit   0x00000100   #define  PSR_E_BIT   0x00000200   # define psr_j_bit   0x01000000   #define  PSR_Q_BIT    0x08000000   #define  PSR_V_BIT   0x10000000   #define  psr_c_bit    0x20000000   #define  PSR_Z_BIT   0x40000000   #define  PSR_N_BIT   0x80000000   3 anomaly vector table jumpAccording to the Anomaly vector table, you can jump when there is an exception, but where to jump. Some of the labels can not be found, such as VECTOR_IRQ is where.
3.1 Vector_srub macro definition [CPP]View Plain