Linux Learning: Porting u-boot_2016.09 to JZ2440 Development Board

One. Download Source: ftp://ftp.denx.de/pub/u-boot/

Two. Initialize the compilation:

①make Smdk2410_defconfig #首先使用默认配置, reducing subsequent configuration work
②make Menuconfig #根据自身需求进一步配置
③ modifies makefile, starting with schema and compiler only:
Arch=arm
cross_compile=arm-linux-
④ Modifying the Uboot code:

1. Set the clock function of the PLL in the Board_init_f in _main in the Initialize function list in boad_early_init_f , set the MPLL multiplier value. It should be set between setting the crossover factor and initializing the memory controller.

SMDK2410.C can be commented out:

  /**   //Writel (0xFFFFFF, &clk_power->locktime);

　　　　    /**     //Writel ((m_mdiv <<) + (M_pdiv << 4) + m_ SDIV,
           　　//      &clk_power->mpllcon);

At start. s in the re-set:

#if0/*FCLK:HCLK:PCLK = 1:2:4*/    /*default FCLK is in + MHz!*/Ldr R0,=CLKDIVN mov r1, #3str R1, [R0]#else        /*2. Setting the clock*/Ldr R0,=0x4c000014        //mov r1, #0x03; //Fclk:hclk:pclk=1:2:4, Hdivn=1,pdivn=1mov R1, #0x05;//Fclk:hclk:pclk=1:4:8str R1, [R0]/*if the HDIVN non-0,CPU bus mode should be changed from "Fast bus Mode" to "Asynchronous bus "*/MRC P15,0, R1, C1, C0,0       /*read-out control register*/Orr R1, R1, #0xc0000000         /*set to "Asynchronous Bus mode"*/MCR P15,0, R1, C1, C0,0       /*Write Control Register*/            #defineS3c2440_mpll_400mhz ((0x5c<<12) | ( 0X01&LT;&LT;4) | (0x01))/*Mpllcon = S3c2440_mpll_200mhz*/Ldr R0,=0x4c000004LDR R1,=S3c2440_mpll_400mhz str R1, [R0]/*Start Icache*/MRC P15,0, R0, C1, C0,0@ Read Control reg Orr R0, R0, # (1<< A) MCR P15,0, R0, C1, C0,0@ Write it back#endif

Another method of modification:

Modify the clock macro defined by SMDK2410.C as follows:
#define M_MDIV 0x5c
#define M_PDIV 0x1
#define M_SDIV 0x1

Then add a register setting in Board_early_init_f (void):
Writel (0x5, &CLK_POWER->CLKDIVN);

2. Change the setting value of the memory controller to the following:/board/samsung/smdk2410/lowlevel_init. S

Smrdata:#if0. Word (0+ (b1_bwscon<<4) + (b2_bwscon<<8) + (b3_bwscon<< A) + (b4_bwscon<< -) + (b5_bwscon<< -) + (b6_bwscon<< -) + (b7_bwscon<< -). Word (B0_tacs<< -) + (b0_tcos<< One) + (b0_tacc<<8) + (b0_tcoh<<6) + (b0_tah<<4) + (b0_tacp<<2)+(B0_PMC)). Word (B1_tacs<< -) + (b1_tcos<< One) + (b1_tacc<<8) + (b1_tcoh<<6) + (b1_tah<<4) + (b1_tacp<<2)+(B1_PMC)). Word (B2_tacs<< -) + (b2_tcos<< One) + (b2_tacc<<8) + (b2_tcoh<<6) + (b2_tah<<4) + (b2_tacp<<2)+(B2_PMC)). Word (B3_tacs<< -) + (b3_tcos<< One) + (b3_tacc<<8) + (b3_tcoh<<6) + (b3_tah<<4) + (b3_tacp<<2)+(B3_PMC)). Word (B4_tacs<< -) + (b4_tcos<< One) + (b4_tacc<<8) + (b4_tcoh<<6) + (b4_tah<<4) + (b4_tacp<<2)+(B4_PMC)). Word (B5_tacs<< -) + (b5_tcos<< One) + (b5_tacc<<8) + (b5_tcoh<<6) + (b5_tah<<4) + (b5_tacp<<2)+(B5_PMC)). Word (B6_MT<< the) + (b6_trcd<<2)+(B6_scan)). Word (B7_MT<< the) + (b7_trcd<<2)+(B7_scan)). Word (Refen<< at) + (trefmd<< A) + (trp<< -) + (trc<< -) + (tchr<< -)+refcnt). Word0x32. Word0x30. Word0x30#else  .Long 0x22011110     //Bwscon.Long 0x00000700     //BANKCON0.Long 0x00000700     //BANKCON1.Long 0x00000700     //BANKCON2.Long 0x00000700     //BANKCON3.Long 0x00000700     //BANKCON4.Long 0x00000700     //BANKCON5.Long 0x00018005     //BANKCON6.Long 0x00018005     //BANKCON7.Long 0x008c04f4     //REFRESH.Long 0x000000b1     //banksize.Long 0x00000030     //MRSRB6.Long 0x00000030     //MRSRB7 #endif

3. Modify the baud rate to correct the macro definition for smdk2410.h:

#define CONFIG_S3C2410/* Specifically a SAMSUNG s3c2410 SoC */
#define CONFIG_S3C2440

4. Support Nor-flash: Add a matching nor-flash vendor ID and device ID on the board in Jedec_flash.c jedec_table[]:

{/*Sheldon Add for JZ2440 Nor_flash*/. mfr_id=(U16) mx_manufact,. dev_id=0x2249,. Name="mx29lv160d",. Uaddr= {                                                                               [1] = MTD_UADDR_0X0555_0X02AA/*x16*/               },                                                                                        . Devsize=Size_1mib,. Cmdset=P_ID_AMD_STD,. Numeraseregions=4,. Regions={eraseinfo (0x10000, to), Eraseinfo (0x08000,1), Eraseinfo (0x02000,2), Eraseinfo (0x04000,1),                                                              }      

PS: Test if Norflash can read and write correctly, and use the following U-boot command:

CP.B 0 30000000 80
CMP.B 0 30000000 80
Found no problem reading Norflash. Test write Norflash with the following commands :
MW.B 30000000 12 3
Protect off all
Erase 0 FFFF
CP.B 30000000 0 3
MD.B 0 3;
Discovery is also 121212, so write Norflash success, so U-boot has supported the JZ2440 Development Board Norflash.

Linux Learning: Porting u-boot_2016.09 to JZ2440 Development Board