It's not something new, and the wireless router has been using it a long time ago, but it has only recently begun to understand its rationale. Now the network embedded device's function is more and more powerful, each chip manufacturer's solution method supports this kind of complexity. Recently the company internship, to do a home gateway project. The following should not be counted as leaks, write a little more casually.
1. A Network chip architecture
You should be able to see that this is a DSL chip. Its network is composed of a switch core core, the external 3 Exchange port (pink): The left side is an Ethernet MAC, can be an external Ethernet chip Mac or PHY, known as the LAN side, the right side of the DSL TPS child layer, according to the DSL standard transmission ATM/PTM data, become WAN end; Above is a PDMA chip-level bus that communicates with SOC on-chip systems.
In addition, there are several additional switching ports, mainly providing additional functionality: A QDMA is used to extend the core outer mem; LTR and WTR are two conversion engines, and when LAN or WAN-side packets require some special processing (such as VLANs, PPPoE first Class), they are exchanged to the two ports for conversion and then sent back to the queue. In addition, LAN, WAN end each have a classifier, is a pre classifier, before the packet into switch core, a rough division, decide which port to send.
The above functional Metropolitan Switch core is independently completed, and the SOC system can only be configured and controlled simply. So the new energy of the SOC does not need to be too high (the CPU is probably 130MHz). Note that the difference between the switch core and the general Ethernet switch is that the port type is different first, and the functionality provided is complex.
Here gives a simple Ethernet switch chip architecture, as shown in the following figure, its core is a register set, configure them (internal EEPROM, or external Mdio bus), you can achieve Port-vlan, two-layer filter and other functions. The structure is relatively simple because all of its ports are Ethernet.
Using the chip to connect to the LAN end of the DSL chip, the network system is made up as shown in the following diagram:
Ethernet switch can realize Port-vlan function autonomously, and connect with switch core through a trunk port. And switch core has a good vlan_tag classifier function. In addition, the WAN Terminal implements 8 hardware channel PVCs, and switch core can also classifier it well. In summary, you can realize the so-called port-mapping function, as long as a DSL access line, you can achieve in the home IPTV, Internet, videophone and other business separation.
Note that all of these features are automatically switch core, and network packets do not need to go into the SOC stack, which is different from the general router that follows.
2. Embedded on-chip system
2.1 Ways to interact with the outside world
The main functions of SOC system here are: interaction with external users, parsing user instructions, configuring the system.
Parsing instructions for the software system is very simple, configuration system, the front also said, mainly read and write some register, also very simple. The key is to interact with outside users.
It is easy to think of a way is the network, SOC also connected to switch core, has its own IP, MAC. Of course, it and switch core is a piece of bus, communication does not need a Mac, here just pretend to be a general-purpose Ethernet device, can be switch core and external PC recognition.
To communicate, of course, the protocol stack is needed, but the SOC system here does not need to process additional (normal communication) data, so the protocol stack also chooses a simple lwip, as described in the previous blog post. The most common way of network communication is HTTP, in addition, there are telent and so on.
Hehe, the connection 192.168.1.1 actually is to connect its internal SOC, the general switch, the router all is such, not what port. When I was a super rookie, this problem plagued for a long time, tangled.
In addition, embedded system, there is one of the most commonly used interactive mode is the serial UART. UART is a very simple I/O device, it through directly read and write the PIN level signal (serial) to achieve the input and output, without any additional interrupt, control and other mechanisms. Although simple, can not be used to achieve complex, reliable functions, but as an embedded system debugging method is very effective.
UART is like a keyboard/monitor for embedded devices. It is a very simple hardware resource, on which you can build a common I/O device TTY, above TTY, you can implement a variety of applications, such as Shell.
Hardware resources UART, virtual layer equipment TTY are the resources of the system, in Uc/os, generally as a global volume, the application of which is done through task. As in Xshell_task, it is through a while (1) loop that the command line is continuously read through the Tty_get_line (). Note that the function is no longer a bare hardware operation, but adds an upper-level operation that recognizes/r/n as a terminator and is done by a while (1) loop. Read the level is empty, then ignore, because UART is too simple, no interruption, caching mechanism, etc. (no detailed area, just a cursory glance at the code, as if it is so!).
Finally, the outside user reads and writes the level, certainly different uses the oscilloscope. Oh, PC upload a serial drive, then the PC Keyboard/monitor for the embedded board used.
It's like a knot, you don't understand it one day, and you can't safely develop embedded systems, even though you can write the software very well.
When a traditional PC is powered on, the CPU core instruction pointer (such as CS:IP) points to a piece of cured code in the system, such as the BIOS, which is burned in ROM memory and the power loss is not lost. They call the code we develop (such as operating system software, or some simple front-and-back programs).
An embedded how to start, in effect and PC (all such code machine) almost. Of course, different manufacturers of chips, also have their own way characteristics, to the company's chip (note that this is the chip on the Integrated SOC subsystem), it has several ways to start.
First of all, the chip is integrated into a bootrom, it inside the code (that is, the binary gate circuit) is part of the chip, that is, chip production. The chip has an external pin (boot-mode_pin), put it to the lower, then the chip on the IP point to the bootrom, the implementation of the code inside. The code is very simple, generally implement BOOTP, TFFP and other functions, from the network download the OS kernel into memory to run. This is the so-called network diskless system working mode.
But now it seems to use less of the way, memory cheap ah. Generally will pull the boot-mode_pin, so after the IP point to the external flash. It is easy to think that Flash and the PC on the hard disk similar, is almost, a little different. The PC executes the BIOS first, and the BIOS mounts the bootloader sector of the hard drive. And the embedded system is generally not so troublesome, it directly in Flash to run the code.
Now the Cpu-core are generally 32-bit, that is, 4G physical addressing space, and the embedded SDRAM is not so large, all can be external flash and SDRAM together address:
After the system on electricity, IP point 2G, you can run the initial code in Flash, but the speed is relatively slow, so the beginning of the code is often to the back of an image download to SDRAM, and then run in SDRAM.
As for the base address of flash why can be 2G, this is by the CPU and flash of the SPI bus special circuit connection way to decide, oh, the electronic origin should not be difficult to understand. Furthermore, some chips also raise external pin pins to add an offset (such as 1M) to the address line, so two processors can use a different part of the same flash (0~1m,1~2m), and the interior only feels like it starts with a 2G address.
The following key question is, what is in Flash, how to come, can change?
General Flash in the things, is a specific application to determine, the beginning is generally bootloader code, there is an image file, the company's network system, need a startup configuration file, also simple in Flash:
Bootloaer is generally placed at the beginning for easy execution. The latter can also be directly in accordance with the physical space allocation, a little more complex, can also be made into file system FS, such as Embedded Linux. Mainly includes some configuration files, log information files. The most important is the image file, generally to be loaded into the SDRAM to run, which is the key to our development system function application.
So how did these things come from? Generally initial, will use a specific hardware tool manufacturer to provide an initial file (format is shown above) to burn to Flash, just as we burned 8051 SCM, and then flash welding on the board. If the operation, the code was changed to death, the system can not start again, that sorry, can only be a new flash welding. One way to do this is to prepare two image in Flash, a special case on the board, and a new image (the Flash-offset method described earlier). There is also a way, through the internal bootrom boot, diskless boot. The implementation of course requires a certain amount of hardware support, as described in the previous boot-mode_pin can not be welded, with a jump, or through a number of special circuits connected to the Ethernet, Ethernet prior to data transmission, the use of internal start-up, such as multicast upgrade. The methods are different.
Finally, the contents of the flash inside how to change? Very simple, since it is also in the CPU's change site, directly with the CPU to write data to flash not on the line. Generally with the HTTP service, the client will post an image file, server-side check no problem, write to Flash, this is the manual upgrade.
3. Architecture analysis of a wireless router
The company chip solution mentioned above, the SOC subsystem is very limited in functionality, communication packets generally do not go to the SOC protocol stack. and the current market of wireless router system, the system's CPU function is generally very strong, RAM configuration is also very powerful, generally can run large system software, such as Linux.
This is a separate chip, and it contains almost all the contents of a complete PC motherboard, CPU function is still very strong, 670MHz MIPS core, through the bridge to connect the data bus. The sys_bus here are almost equivalent to the PCI bus in the PC, such as USB controllers, all of which are hung under it. Here is a look at network equipment, mainly two, a 802.11n standard WLAN transceiver, a 4fe+2ge Ethernet switch.
Unlike the DSL chip described earlier, both of his network interfaces are connected to the system bus and not interacting through a switch-core. As a result, a fully functional stack of protocols must be maintained within the CPU, and SWC are often virtualized to WAN and LAN ports, as shown in the following chart:
First of all, first clear a concept, in the statistics network device port number, do not forget that there is a port connected to the CPU. For example, SWC has an external 4fe+2ge, and in fact it has a seventh port connected to the CPU. Then you can understand that some data transfer is only done in these network devices, while others need to enter the CPU stack. The more accurate concept should be that the chip CPU system is also equivalent to a PC, which is connected to the switching device.
The special here is this SWC device, logically all its ports should be equivalent, the network segment is the same, but through VLAN technology, 3, 4, CPU port into a VLAN, and 5, CPU to another VLAN, this is the SWC hardware support port-mapping, It can only allow the machine to communicate under the same VLAN. Here is a special CPU port, which belongs to two VLAN, called TRUNK,SWC Hardware in the trunk port to send and receive data, must have Vlan_tag (802.1q). In the CPU system, because there is only one physical path, only software to achieve the VLAN partition (such as the VLAN under Linux). In addition, the WLAN is generally hung in the LAN, so in Linux you can use a virtual bridge device to connect the two devices. Here are some ways to exchange data:
3, 4 communication, in the PC-initiated ARP protocol phase, SWC also learned and recorded the Mac table, SWC can be directly exchanged.
1, 2 communication, also like the Ethernet switch, directly in the WLAN device Exchange? I haven't studied the WLAN protocol, let's see.
3, 1 communication, is the same network segment, DMAC for the PC1 MAC address, in the SWC will be sent it from the CPU port, of course, will add lan_vlan-tag, so will be netdev_eth equipment received, and the device has become a bridge equipment, a port, So bridge equipment will take over the PKT, and according to the Mac table, from the Netdev_wlan device (already port) issued, WLAN equipment after PKT, according to 802.11N protocol, to the corresponding PC.
5 and other communications, whether 3, 4 or 1, 2, are different network segments, so in the PC routing system, will send the data to the GW-IP2, that is, PKT Dmac for the CPU on the chip Mac, then in SWC will be PKT from the CPU port, of course, will play Wan_vlan-tag , it will be received by the Netdev_eth-vlan device and into the stack of the CPU system on the chip (note that 3 of the previous cases will not be entered). At this point on the chip CPU system as a routing function, select Bridge equipment issued, bridge equipment in accordance with the Mac select the corresponding port issued.
Other to 5 communication, as above, just the direction of the reverse.
On the chip CPU system itself also has the Mac, the IP (192.168.1.1), the external PC sends the data, through the WLAN, the SWC device arrives the CPU system Interface,interface discovery is sends itself, will pass to the upper stack.
Of course, this is only the most basic situation, now the router device has integrated a lot of features, such as DHCP, NAT, DNS, and so on.