Msm8909 + android5.1.1 -- enable debug serial port

Msm8909 + android5.1.1 -- enable debug serial port

Msm8909 + android5.1.1 -- enable debug serial port

1. Place of joint Modification

(1) kernel \ arch \ arm \ configs \ msm8909-1gb-CB03_defconfig

Make the following items valid

CONFIG_SERIAL_MSM_HSL = y

CONFIG_SERIAL_MSM_HSL_CONSOLE = y

 

Add the following items

CONFIG_DEBUG_LL = y

CONFIG_EARLY_PRINTK = y

 

(2) Root/bootable/bootloader/lk/project/msms8909.mk

Make sure DEFINES + = WITH_DEBUG_UART = 1

 

2. V1.0 Motherboard

Figure 1

UART1_TX-------GPIO_4

UART1_RX-------GPIO_5

 

(3) device \ qcom \ sepolicy \ common \ file_contexts ---- make-j4 is required

Make the following items valid

/Dev/ttyHSL0u: object_r: console_device: s0

 

(4) kernel \ arch \ arm \ boot \ dts \ qcom \ msm8909-cb03.dtsi

Disable the following items

Spi0 = & spi_0;/* SPI0 controller device */

Make the following items valid

 

      blsp1_uart1:[email protected] {              compatible= "qcom,msm-lsuart-v14";              reg= <0x78af000 0x200>;              interrupts= <0 107 0>;              status= "disabled";              clocks= <&clock_gcc clk_gcc_blsp1_uart1_apps_clk>,                      <&clock_gcc clk_gcc_blsp1_ahb_clk>;              clock-names= "core_clk", "iface_clk";       };

 

(5) kernel \ arch \ arm \ boot \ dts \ qcom \ msm8909-qrd-cb03.dtsi

Make the following items valid

 

&blsp1_uart1 {       status= "ok";       pinctrl-names= "default";       pinctrl-0= <&uart_console_sleep>;};

 

3. V1.1 main board

 

Figure 2

UART2_TX-------GPIO_20

UART2_RX-------GPIO_21

 

Figure 3

 

UART_VDD_EN------I2C extension IC XRA1201 P6 pin.

 

The modifications are as follows:

(1) \ bootable \ bootloader \ lk \ platform \ msm8909 \ msm8909-clock.c

Msm_clocks_msm8909 [] added:

 

CLK_LOOKUP("uart2_iface_clk",gcc_blsp1_ahb_clk.c),CLK_LOOKUP("uart2_core_clk",  gcc_blsp1_uart2_apps_clk.c),

 

(2) bootable \ bootloader \ lk \ target \ msm8909 \ init. c

Under the target_early_init () function

 

Uart_dm_init (1, 0, BLSP1_UART0_BASE); changed to uart_dm_init (2, 0, BLSP_UART1_BASE );

 

(3) \ bootable \ bootloader \ lk \ platform \ msm8909 \ gpio. c

Target_early_init () ---> uart_dm_init (id) ---> gpio_config_uart_dm ()

 

/* configure rx gpio */       gpio_tlmm_config(5,2, GPIO_INPUT, GPIO_NO_PULL,                            GPIO_8MA,GPIO_DISABLE);        /*configure tx gpio */       gpio_tlmm_config(4,2, GPIO_OUTPUT, GPIO_NO_PULL,                            GPIO_8MA,GPIO_DISABLE);       #endif

 

Change

 

/* configure rx gpio */       gpio_tlmm_config(21, 3, GPIO_INPUT, GPIO_NO_PULL,                            GPIO_8MA,GPIO_DISABLE);        /*configure tx gpio */       gpio_tlmm_config(20, 3, GPIO_OUTPUT, GPIO_NO_PULL,                            GPIO_8MA,GPIO_DISABLE);

 

(4) \ kernel \ arch \ arm \ mach-msm \ include \ mach \ msm_iomap-8909.h

# Change define MSM_DEBUG_UART_PHYS 0x78AF000 to 0x78B0000

 

(5) device \ qcom \ sepolicy \ common \ file_contexts

Added:

/Dev/ttyHSL1 u: object_r: console_device: s0

If/dev/ttyHSL0 u: object_r: lele_device: s0 does not affect the operation.

 

(6) kernel \ arch \ arm \ boot \ dts \ qcom \ msm8909-cb03.dtsi

Make sure the following is valid

 

blsp1_uart2: [email protected] {              compatible= "qcom,msm-lsuart-v14";              reg= <0x78b0000 0x200>;              interrupts= <0 108 0>;              status= "disabled";              clocks= <&clock_gcc clk_gcc_blsp1_uart2_apps_clk>,                      <&clock_gcc clk_gcc_blsp1_ahb_clk>;              clock-names= "core_clk", "iface_clk";       };

 

Comment out blsp1_uart1 because BLSP1 is used as SPI.

 

(7) \ kernel \ drivers \ misc \ msmgpio_ctrl.c

Msmgpio_ctrl_probe () added

Gpio_direction_output (pdata-> uart?vcc, 1); // ensure 3.3V Power Supply

 

In this example, you can change it to gpio_direction_output (pdata-> uart1_vcc, 0). You can also output debugging information, which may be powered elsewhere.

 

(8) msm8909-qrd-skue-cb03.dtsi, more important

 

/ {       aliases{              serial1= &blsp1_uart2;// should be no serial1, 0 for console       };};

 

Make sure that the serial port is used.

\ Kernel \ Documentation \ devicetree \ bindings \ tty \ serial \ msm_serial.txt

 

Aliases:An alias may optionally be used to bind theserial device to a tty device(ttyHSLx) with a given line number. Aliasesare of the form serial
 
   where 
  
   is an integer representing the line numberto use. On systems with multipleserial devices present it is recommendedthat an alias be defined for each suchdevice.
  
 

 

(9) msm8909-pinctrl-cb03.dtsi and msm8909-pinctrl.dtsi

 

pmx-uartconsole {                     qcom,pins= <&gp 4>, <&gp 5>;                     qcom,num-grp-pins= <2>;                     qcom,pin-func= <2>;                     label= "uart-console";                     uart_console_sleep:uart-console {                            drive-strength= <2>;                            bias-pull-down;                     };              };

 

Change qcom, pins = <& gp 4>, <& gp 5>; To qcom, pins = <& gp 20>, <& gp 21>;

 

(10) \ device \ qcom \ msm8909 \ BoardConfig. mk

Release: = console = ttyHSL0, 115200, n8 androidboot. console = ttyHSL0 androidboot. hardware = qcomuser_debug = 31 release = 0x3F ehci-hcd.park = 3androidboot. bootdevice = 7824900. sdhci release = 1 earlyprintk

The preceding ttyHSL0 is changed to ttyHSL1 and the last earlyprintk is removed. Otherwise, the startup failure information is as follows:

 

Android Bootloader - UART_DM Initialized!!![70] Not able to search the panel:[80] Logo config doesn't match with fbconfig. Fall back default logo[520] Channel alloc freedUncompressing Linux... done, booting thekernel.

 

The host may be stuck here when it is started, or it will be stopped after multiple automatic restart attempts. All this information is output. This problem occurs when earlyprintk is added.

 

(11) kernel \ arch \ arm \ boot \ dts \ qcom \ msm8909-cb03.dtsi

 

4. Differences in debugging information can be displayed between the V1.0 and V1.1 boards.

 

The V1.0 motherboard can output debugging information in the earlier startup phase. It should be changed from UART1 to UART2, and some other issues have not been changed, as shown below:

 

Format: Log Type - Time(microsec) - Message- Optional InfoLog Type: B - Since Boot(Power OnReset),  D - Delta,  S - StatisticS -QC_IMAGE_VERSION_STRING=BOOT.BF.3.1.2.C2-00014S - IMAGE_VARIANT_STRING=DAASANAZAS - OEM_IMAGE_VERSION_STRING=BU3-gongyong5S - Boot Config, 0x000000e1B -     1566 - PBL, StartB -     4542 - bootable_media_detect_entry, StartB -    74039 - bootable_media_detect_success, StartB -    74043 - elf_loader_entry, StartB -    75610 - auth_hash_seg_entry, StartB -    75871 - auth_hash_seg_exit, StartB -    90062 - elf_segs_hash_verify_entry, StartB -   148922 - PBL, EndB -   170342 - SBL1, StartB -   231739 - boot_flash_init, StartD -       30 - boot_flash_init, DeltaB -   238662 - boot_config_data_table_init, StartD -     5642 - boot_config_data_table_init, Delta - (0 Bytes)B -   249276 - CDT version:3,Platform ID:11,Major ID:1,Minor ID:0,Subtype:12B -   257054 - pm_device_init, StartB -   260378 - pm_device_init, TEST - MSM8909 detectedB -   266051 - pm_device_init, INFO - PM8909 is selectedB -   280783 - PM_SET_VAL:SkipD -    22112 - pm_device_init, DeltaB -   282186 - sbl1_ddr_set_params, StartB -   284565 - cpr_init, StartD -        0 - cpr_init, DeltaB -   290207 - Pre_DDR_clock_init, StartD -      183 - Pre_DDR_clock_init, DeltaD -        0 - sbl1_ddr_set_params, DeltaB -   303139 - pm_driver_init, StartB -   309941 - --> Charge initB -     3939 - battery voltageB -   313448 - boot upB -       10 - Current statusD -    10614 - pm_driver_init, DeltaB -   325557 - clock_init, StartD -      152 - clock_init, DeltaB -   325923 - Image Load, StartD -    22814 - QSEE Image Loaded, Delta - (460120 Bytes)B -   348767 - Image Load, StartD -      549 - SEC Image Loaded, Delta - (2048 Bytes)B -   357063 - sbl1_efs_handle_cookies, StartD -      762 - sbl1_efs_handle_cookies, DeltaB -   363773 - Image Load, StartD -    14731 - RPM Image Loaded, Delta - (154076 Bytes)B -   378535 - Image Load, StartD -    19551 - APPSBL Image Loaded, Delta - (466512 Bytes)B -   398147 - QSEE Execution, StartD -      335 - QSEE Execution, DeltaB -   403881 - SBL1, EndD -   235826 - SBL1, DeltaS - Throughput, 33000 KB/s  (1082756 Bytes,  32538 us)S - DDR Frequency, 400 MHz