MSM8909 + Android5.1.1 keyboard driver --- sn7326 Introduction
1. Sn7326 Overview
SN7326 is a keyboard extension chip with intelligent self-scanning, supporting up to 8x8 buttons. The press/release button action is encoded into a byte of data and stored in the key event register. The master controller can read the key event register through the I2C serial bus.
SN7326 has the dejitter function. When any key is pressed, the interrupt output pin is set to low. To reduce power consumption, SN7326 automatically enters the low power consumption mode when no key action is triggered.
Main features of SN7326
(1) 2.4V to 5.5V operating voltage
(2) kHz I2C serial interface
(3) multiple keys can be detected and simultaneously pressed
(4) The standby current as low as 0.3uA (VDD typical value is 3.3 V)
2. Schematic Design
Our device has a qwerty keyboard and a simple keyboard, which are extended by pressing the SN7326 button, and then connected to the CPU through the level conversion chip NLSX4378, such
SCL---GPIO_11
SDA---GPIO_10
KEY_INT---GPIO_98
KEY_RST---GPIO_2
KEY_UP---GPIO_90
KEY_DOWN---GPIO_91
The CPU uses the KEY_INT pin to determine whether to press the key, and then reads the value of the SN7326 register through I2C to determine which key is pressed, and finally reports it to the system.
3. sn7326 device address
Figure 2
A0 indicates the read/write flag, A0 = 0 indicates the write command, and A0 = 1 indicates the READ command. Our design AD1 and AD0 connect to VDD, so AD1 = AD0 = 0, so the device address is 1011000 + A0
4. Introduction to sn7326 registers
There are configuration registers and key status registers.
Figure 3
(1) configuration register (0x08)
The DE bit can be used to control whether to enable jitter.
Long key detection delay time can be set for LT bits
(2) Key Status Register (0x10)
The DN bit can be used to determine whether one or more buttons are pressed.
KS bit to know whether the button is pressed or released
KM refers to the encoding bit of the key position, indicating the encoding of up to 64 keys. After reading the key Status Register (DN = 0), this register is set to 00000000, and the/INT pin is set to high.
The key ing table is as follows:
Figure 4
Note that when an interrupt occurs, you must read the value of the key status register, that is, when the DN bit of the key Status Register is 0, stop reading the key status register.
5. Typical applications
5.1 power-on Reset
The SN7326 contains a complete power-on reset circuit that ensures that all registers are reset to a known State upon power-on. When VDD> 2.4 V, the power-on circuit releases the registers and I2C interfaces to work properly. When VDD
5.2 I2C Reset Control
When the I2C bus is locked, send a low level to the RST pin to enable the I2C bus reset to continue communication. This reset action does not affect the interrupt output.
5.3 standby mode
When the bus is idle, SN7326 automatically enters the standby mode to reduce the power supply current.
5.4 automatic button Scan
SN7326 supports an 8*8 matrix keyboard scan. Eight input ports (OD ports) require a 100kb. Eight input ports (PP ports) are used in standby mode) dropped.
If the keyboard status changes, the keyboard will scan three times in the bounce latency (debounce delay. When the captured button is pressed/released, the button event is encoded and written to the button Status Register, and an interrupt occurs through/INT. The key Status Register is read from the lowest encoding value to the highest encoding value to report the key events.
The/INT pin remains low until the key event is read, except in one case, that is, when enabling the automatic clearing/INT function, if all the key event data is not read at the programming time (determined by the SD bit of the 08h register), The/INT pin becomes high when the programming time is reached. However, the temporary key Status Register remains unchanged and the key event data can be read until another key is detected.
5.5 debounce)
When SD = 0/1 of the configured register (08 h) and the keyboard status changes, the keyboard scans and saves the data 1st times to the temporary register, waiting for 6/3 ms for 2nd scans, wait for 8/4 MS for 3rd scans. If the scan results are the same, the key event data will be locked to the temporary key status register and set to/INT. Otherwise, the scan stops and the device returns to the standby mode. No data is saved to the temporary key status register and/INT remains high.
5.6 Long-pressed Key Detect)
When LE = 1 in the configuration register (08 h), enable the long button function. When there are buttons on time, the chip will automatically send the interrupt signal and scan button again, knowing that the button is released, the long button detection interval is determined by the configuration register (08 h) LT bit.
5.7 key event interruption
Once the key event code is locked to the temporary key Status Register, an interrupt signal is output to the MCU. Before the keyboard time is read, The/INT value remains low, any changes to the keyboard status are ignored. Except for one case: If the/INT automatic clearing function is enabled, the/INT pin changes to high when the programming time is reached. However, the temporary key Status Register remains unchanged and the key event data can be read until another key is detected.
5.8 automatic INT clearing
This function is enabled if ACI = 01/10 of the configuration register (08 h. After an interruption occurs, even if the value of the key Status Register is not fully read, the value is automatically set to/INT in 5/10 ms. When/INT is low, the data in the key status register will not change. The value of the year Status Register can be read no matter whether/INT is high or low. However, if a new button event is triggered, new data will be written to the button status and sent to you. Old data will be lost and only new data can be read.
5.9 input port Filter
Configure to send your DE = 1 to enable the input port filter function. When DE = 0 and the input port filtering function is disabled, the chip will respond to any changes to the input port. When DE = 1, any pulse smaller than 100ns will be filtered out. If the input pulse width is greater than 100ns, the chip will respond to the signal.
Figure 5