[Other] Computer composition principle decomposition experiment: Experiment 2 Ram Experiment

Experiment 2 Ram

I. Tutorial purpose:

Measure the test taker's knowledge about the working principle and usage of semiconductor static random read/write Memory RAM.

Master the word and bit extension technology of semiconductor memory.

Ii. devices and instruments used in the experiment:

Ram uses two mm2114 cards

74ls125 for isolating Components

74ls138 Decoder

Iii. experiment content:

1 k x 4 chips are used to form 1 k x 8 memory.

◆ Select five discontinuous storage unit addresses and store different contents as the addresses of individual storage unit

Read/write operation experiment.

◆ Uses a 1 k x 4 chip to Form 2 k x 4 memory.

◆ The decoder must be used for expansion (all three inputs are used and connected to the switch ).

◆ Select five discontinuous storage unit addresses and store different contents as the addresses of individual storage unit

Read/write operation experiment.

◆ Select an appropriate chip and design an experimental circuit diagram based on the polarity and timing requirements of various control signals.

◆ Design test steps respectively.

◆ Use the switch to load data, display the experiment results through the indicator, record the test phenomenon, and write the experiment report. The address range of each RAM chip in the word extension test is given.

Iv. Experiment tips:

To simplify the test, the address can only be 4 low bits (other addresses can be grounded ).

V. Wiring Diagram and results of the experiment:

Basic test plan:

Part 1: A 1 k x 4 chip is used to form 1 k x 8 memory.

Design Line:

Lab operations for word extension:

1. Initialization:

Push k15 (C signal of 74ls125) to the High Level and disconnect the input.

Push k13 (RAM chip selection signal) to the low level and select Ram.

Push K14 (read/write control) to the read status to prevent modification to the data along the path during address selection.

2. Write Data:

Convert K0 ~ To the address you want to enter.

Change K4 ~ K11 is adjusted to the binary input value.

Push k15 (C signal of 74ls125) to a low level and connect to the switch input.

Push K14 (read/write control) to the low-level write status to write data.

3. Read data:

Push K14 (read/write control) to the high read status to disconnect writing to ram.

Push k15 (C signal of 74ls125) to the High Level, disconnect the switch and then read the data.

Part 2: A 1 k x 4 chip is used to form 2 k x 4 memory.

Design Line:

Lab operations for bit extension:

1. Initialization:

Push k15 (C signal of 74ls125) to the High Level and disconnect the input.

Push k13 (the first RAM chip selection signal) to the low level, select Ram,

At the same time, ensure that the K12 (the second RAM chip selection signal) is pushed to the high level, so that Ram is invalid.

Push K14 (read/write control) to the read status to prevent modification to the data along the path during address selection.

2. Write Data:

Convert K0 ~ To the address you want to enter.

Change K4 ~ K7 is adjusted to the binary input value.

Push k15 (C signal of 74ls125) to a low level and connect to the switch input.

Push K14 (read/write control) to the low-level write status to write data.

3. Read data:

Push K14 (read/write control) to the high read status to disconnect writing to ram.

Push k15 (C signal of 74ls125) to the High Level, disconnect the switch and then read the data.