Principle of computer composition--instruction line

principle of computer composition--Instruction line 1. Overview

To improve CPU utilization and speed up execution, the instructions are divided into phases that can execute different stages of different instructions in parallel, so that multiple instructions can be executed simultaneously. In the case of effectively controlling the pipeline congestion, the pipeline can greatly improve the speed of instruction execution. Blog Park Knowledge Base: The exploration of CPU pipeline

Classic five-level pipeline: Fetch, Decode, execute, access memory (read or write), result writeback register. Link: The history of the most classic 5-level pipeline

There are three types of pipeline blocking (Baidu knows):

1. Structure-Related: In the process of instruction overlap execution, the hardware resources can not meet the requirement of overlapping instruction, and the resource conflict will result in the structure correlation. The solution is to increase hardware resources, such as the use of the command cache and the data cache separation of the Harvard structure to resolve the conflict.

2. Data correlation: When an instruction requires the execution result of a previous instruction, and the two are executing in parallel, data correlation is generated.

3. Control Related: There are jump statements or other instructions to change the IP value, will produce control-related.

　　

　　

Principle of computer composition--instruction line