Fw_common.h contains USRP firmware and host computer common code, Register address mapping, structure definition, etc.
#include <stdint.h>/*! * Structs and constants for USRP2 communication. * This header was shared by the firmware and host code. * Therefore, this header may be only contain valid C code. */#ifdef __cplusplusextern "C" {#endif//FPGA and firmware compatibility numbers#define Usrp2_fpga_compat_num 10#define Usrp2_fw_compat_num 12#define Usrp2_fw_ver_minor 4//used to differentiate control packets over data Port#define USRP2_INV Alid_vrt_header 0typedef struct{uint32_t sequence; uint32_t Vrt_hdr; uint32_t ip_addr; uint32_t Udp_port;} usrp2_stream_ctrl_t;//UDP ports for the USRP2 communication//Dynamic and/or private ports:49152-65535#define USRP2_UDP_ Ctrl_port 49152#define usrp2_udp_update_port 49154#define usrp2_udp_rx_dsp0_port 49156#define USRP2_UDP_TX_DSP0_PORT 49157#define usrp2_udp_rx_dsp1_port 49158#define usrp2_udp_fifo_crtl_port 49159#define USRP2_UDP_UART_BASE_PORT 49170#define usrp2_udp_uart_gps_port 49172//Map for virtual firmware regs (not very big so we can KEep it here-now) #define U2_fw_reg_lock_time 0#define u2_fw_reg_lock_gpid 1#define u2_fw_reg_has_gpsdo 3#define U2_FW_ Reg_ver_minor 7//////////////////////////////////////////////////////////////////////////i²c addresses////////// #define USRP2_I2C_DEV_EEPROM 0x50//24lc02[45]: 7- Bits 1010xxx#defineusrp2_i2c_addr_mboard (Usrp2_i2c_dev_eeprom | 0x0) #defineUSRP2_I2C_ADDR_TX_DB (usrp2_i2c_dev_ EEPROM | 0x4) #defineUSRP2_I2C_ADDR_RX_DB (Usrp2_i2c_dev_eeprom | 0x5)///////////////////////////////////////////////////// EEPROM layout////////////////////////////////////////////////////////////////////////# Define Usrp2_ee_mboard_rev 0x00//2 bytes, Little-endian (historic, don ' t blame me) #define USRP2_EE_MBOARD_MAC_ADDR 0 x02//6 bytes#define usrp2_ee_mboard_gateway 0x38//uint32, big-endian#define usrp2_ee_mboard_subnet 0x08//uint32, big -endian#define usrp2_ee_mboard_ip_addr 0x0C//uint32, Big-endiAn#define usrp2_ee_mboard_bootloader_flags 0xf7typedef enum{usrp2_ctrl_id_huh_what = ",//USRP2_CTRL_ID_FOR_SURE, TODO error condition enums//usrp2_ctrl_id_sux_man, Usrp2_ctrl_id_wazzup_bro = ' a ', usrp2_ctrl_id_wazzup_dude = ' A ', Usrp2_ctrl_id_transact_me_some_spi_bro = ' s ', usrp2_ctrl_id_omg_transacted_spi_dude = ' s ', USRP2_CTRL_ID_D O_an_i2c_read_for_me_bro = ' I ', usrp2_ctrl_id_heres_the_i2c_data_dude = ' i ', usrp2_ctrl_id_write_these_i2c_values_br O = ' h ', usrp2_ctrl_id_cool_im_done_i2c_write_dude = ' h ', Usrp2_ctrl_id_get_this_register_for_me_bro = ' R ', USRP2 _ctrl_id_omg_got_register_so_bad_dude = ' R ', Usrp2_ctrl_id_holler_at_me_bro = ' l ', usrp2_ctrl_id_holler_back_dude = ' L ', usrp2_ctrl_id_peace_out = ' ~ '} usrp2_ctrl_id_t;typedef enum{usrp2_dir_rx = ' r ', Usrp2_dir_tx = ' t '} usrp2_d Ir_which_t;typedef enum{usrp2_clk_edge_rise = ' r ', Usrp2_clk_edge_fall = ' f '} usrp2_clk_edge_t;typedef enum{USR P2_reg_action_fpga_peek32 = 1, usrp2_reg_action_fpga_peek16 = 2, usrp2_reg_action_fpga_poke32 = 3, Usrp2_reg_action_fpga_poke16 = 4, U Srp2_reg_action_fw_peek32 = 5, usrp2_reg_action_fw_poke32 = 6} usrp2_reg_action_t;typedef struct{uint32_t proto _ver; uint32_t ID; uint32_t seq; union{uint32_t ip_addr; struct {uint32_t dev; uint32_t data; uint8_t Miso_edge; uint8_t Mosi_edge; uint8_t num_bits; uint8_t Readback; } Spi_args; struct {uint8_t addr; uint8_t bytes; uint8_t DATA[20]; } I2c_args; struct {uint32_t addr; uint32_t data; uint8_t Action; } Reg_args; struct {uint32_t len; } Echo_args; } data;} usrp2_ctrl_data_t, #ifdef __cplusplus} #endif
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Structure and constants of USRP communication (host computer, slave machine Common)