Linux kernel interruption

Article title: Linux kernel interruption. Linux is a technology channel of the IT lab in China. Includes basic categories such as desktop applications, Linux system management, kernel research, embedded systems, and open source.

　　What is interruption?

The Linux kernel needs to manage all the hardware devices connected to the computer, which is undoubtedly part of it. To manage these devices, you must first communicate with them. Generally, there are two solutions to achieve this function:

Polling allows the kernel to regularly query the device status and then process the status accordingly;

Interrupt (interrupt) enables the hardware to send signals to the kernel as needed (change the kernel to the hardware active ).

The first solution will make the kernel do a lot of useless work, because round robin will always be executed cyclically repeatedly, consuming a lot of CPU time, so the efficiency is low, so the second solution is generally used. Note 1

From the perspective of physics, interruption is an electrical signal generated by hardware devices and directly sent to the input pin of the interrupt controller (such as 8259A, then the interrupt controller sends the corresponding signal to the processor. Once the processor detects this signal, it will interrupt the work it is currently processing and then process the interruption. After that, the processor will notify the OS that an interruption has occurred. In this way, the OS can properly handle this interrupt. Different devices have different interruptions, and each interruption is identified by a unique number. these values are generally called the interrupt request line.

　　APIC vs 8259A

The CPU of the X86 computer provides only two external pins for interruption: NMI and INTR. Among them, NMI is an unshielded interrupt, which is usually used for power loss and physical memory parity checks; INTR is a shielded interrupt, which can be blocked by setting the interrupt shielding bit, it is mainly used to receive interrupt signals from external hardware, which are transmitted to the CPU by the interrupt controller.

There are two common interrupt controllers:

1. programmable interrupt controller 8259A

The traditional Programmable Interrupt Controller is connected by two 8259A-style external chips in Cascade mode. Each chip can process up to 8 different IRQ. Since the INT output line of the PIC is connected to the IRQ2 pin of the main PIC, the number of available IRQ lines reaches 15, as shown in 1.

Figure 1: 8259A cascade schematic

2. Advanced Programmable Interrupt Controller (APIC)

The 8259A is only applicable to a single CPU. in order to fully explore the concurrency of the SMP architecture, it is critical to transmit the interruption to each CPU in the system. For this reason, Intel introduced a new component named I/O Advanced Programmable Controller to replace the older 8259A programmable interrupt controller. This component consists of two components: a local APIC, which is used to transmit interrupt signals to a specified processor. for example, a machine with three processors, it must have three local APIC pairs. Another important part is the I/o apic, which collects Interrupt signals from the I/O device and sends signals to the local APIC when those devices need to be interrupted, the system can have up to 8 I/O APIC.

Each local APIC has a 32-bit register, an internal clock, a local scheduled device, and two additional IRQ lines LINT0 and LINT1 reserved for local interruptions. All local APICS are connected to I/O APIC to form a multi-level APIC system, as shown in figure 2.

Figure 2: multi-level I/O APIC system

Currently, most single-processor systems contain an I/O APIC chip. you can configure this chip in two ways:

1) as a standard 8259A working method. The local APIC is disabled. the external I/O APIC is connected to the CPU, and the two LINT0 and LINT1 are connected to the INTR and NMI pins respectively.

2) as a standard external I/O APIC. The local APIC is activated, and all external interruptions are received by I/O APIC.

To identify whether a system is using an I/O APIC, run the following command on the command line:

# Cat/proc/interrupts

CPU0

0: 90504 IO-APIC-edge timer

1: 131 IO-APIC-edge i8042

8: 4 IO-APIC-edge rtc

9: 0 IO-APIC-level acpi

12: 111 IO-APIC-edge i8042

14: 1862 IO-APIC-edge ide0

15: 28 IO-APIC-edge ide1

177: 9 IO-APIC-level eth0

185: 0 IO-APIC-level via82cxxx

...

If the IO-APIC is listed in the output, your system is using APIC. If you see a XT-PIC, it means your system is using an 8259A chip.

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