0000 On-Chip Network: a new on-Chip System Design Method

Abstract: The development status and trend of On-Chip networks are discussed,

Summarizes the advantages and disadvantages of the On-chip network, and focuses on

The topology and communication modes of the On-chip network are analyzed.

This paper introduces the evolution of networks on chip, summarizes the merits and demerits of NOC, and analyses the topological configuration, and the communication mode of NOC.

Key words: Systems on chip; networks on chip; resources and routers; QoS (Service Quality); Power

1. The on-chip network is a new design method for integrated circuit design.

2. On-Chip Network (NOC) Drivers

(1) interconnection between IP modules on the system chip is the most important issue in the system chip technology. In the future, the system chip will contain dozens or even hundreds of IP modules, and the number of transistors integrated on the chip will exceed 1 billion. Therefore, developing such a complex system chip requires a new interconnection system.

(2) the traditional single-chip multi-processor shared bus has five drawbacks: The bus cannot be used at the same time; the bus frequency is reduced; too many functional components and equipment further increase the noise; with the decrease of feature size, connection delay is the main factor affecting signal delay.

3. Features of On-Chip Networks

(1) A hierarchical protocol stack similar to the simplified network model is integrated, which is different from the grouping mode used by the traditional switch circuit.

(2) high degree of localization and certainty. The power consumption, area constraints, and network design are unique features of on-chip network NOC.

(3) design specialization is another feature of On-Chip networks.

4. Main on-chip network research fields

The concept of an On-Chip Network (NOC) includes the on-chip network architecture, system communication services, and design methods and tools for On-Chip networks.

(1) On-Chip Network Topology

On-Chip networks include resources (nodes) and routers. The most commonly used structure network is the direct network.

Concept of direct network:

Node level: number of channels between two adjacent nodes.

Diameter: the maximum length of the path between two adjacent nodes.

Normalization: it means that the node degrees of all nodes in the On-chip network are equal.

Symmetry: the attributes of each node on the network are the same.

The attributes of the On-chip network topology include the number of nodes, number of switches, switch degree, diameter, distance, network complexity, total bandwidth, and peer bandwidth.

(2) On-Chip Network Communication

Each node has a unique address and connects to other nodes through a router. The on-chip network adopts the hierarchical protocol design concept and is divided into six layers:

1) physical layer: physical implementation includes the number of nodes and the number of routers, the interconnection structure between nodes, and electrical characteristics.

2) data link layer: data packets with standard error detection codes are transmitted between nodes or between node routers to solve the problem that physical layer signals are not reliable due to noise interference.

3) network layer: It mainly refers to how data packets are forwarded, that is, routing algorithms. On each intermediate node, the routing algorithm specifies the channel to be used next. Routing Algorithms should consider the possibility of network connectivity, adaptability, deadlock, and live locks and fault tolerance.

4) Transport Layer: The sending node is responsible for breaking down the message at the transport layer, establishing a data packet, and sending it to the network layer. The receiving node obtains information from the data packet.

5) system layer: Mainly System Software

6) Application Layer: Mainly Application Software

(3) On-Chip Network Power Consumption

Use the minimum power consumption to meet service quality.

(4) QoS of On-Chip Networks

The routing decision of the On-chip network ensures the network bandwidth or delay of key parts. The unguaranteed Communication adopts the best-effort routing policy. To ensure reliable transmission, re-transmission is required when data errors occur. Over-the-stream control mechanism ensures the service quality.

5. Summary

With the rapid development of semiconductors and integrated circuits, the function of on-chip systems is becoming more and more perfect. Traditional design methods for On-chip systems face problems such as complexity, reliability, and effectiveness. The on-chip network can meet the service quality requirements with minimum energy consumption and provide high performance and high reliability with unreliable signal transmission and line delay. Currently, the on-chip network will not completely replace the shared bus technology, but its advanced design methods and concepts will inevitably lead to another revolution in the Microelectronics field.