19. in-depth understanding of computer system notes, virtual memory, and basic principles (1)

1. A process in a system shares CPU and primary memory resources with other processes.

2. Virtual Memory (Virtual Memory) is a complete interaction between hardware exceptions, hardware address translation, primary storage, disk files, and kernel software, it provides a large, consistent, private address space for each process. With a clear mechanism, virtual memory provides three capabilities that require heavy weight: it regards primary storage as a high-speed cache of the address space stored on the disk, only the active area is saved in the primary storage, data is transferred back and forth between the disk and the primary storage as needed. In this way, the primary storage is used efficiently; it is for each process provides consistent address space simplifies memory management. It Protection the address space of each process is not damaged by other processes.

3. physical and virtual addressing

The main memory of the computer system is organized into an array consisting of M consecutive bytes. Each byte has a unique physical address (PA ). The first byte address is 0, and the next byte address is 1 ,...

Early PCs used physical addressing, and systems such as digital signal processors, embedded microcontroller, and Cray supercomputer continue to use this addressing method. Modern processors for general computer designers use virtual addressing ).

MMU (Memory Management Unit) dynamically translates virtual addresses using a query table stored in the primary storage. The table content is managed by the OS.

4. Address Space

An ordered set of non-negative integer addresses: {0, 1, 2 ,...}

If the address is continuous, it is called linear address space. If the computer has a n-bit address bus, in a system with virtual memory, the CPU from a system with n = 2NA virtual address is generated in the address space of the address space, which is called the virtual address space: {0, 1, 2,..., N-1}

Physical address space, which corresponds to M bytes of the physical storage: {0, 1, 2,... M-1}

M is not a power of 2.

Each data object (in bytes) can have multiple independent addresses (attributes). Each address is selected from a different address space, which is the basic idea of virtual addresses. Each byte in the primary storage has a virtual address selected from the virtual address space, and a physical address selected from the physical address space.

5. virtual memory as a cache Tool

Conceptually, virtual memory is organized into an array consisting of n consecutive bytes on the disk. Each byte has a unique virtual address, which serves as the index to the array. The content of the array on the disk is cached in the primary storage. Like other caches in the memory hierarchy, data on the disk (Lower Layer) is divided into blocks, which act as the transmission unit between the disk and the primary storage (higher level. The VM system solves this problem by dividing the virtual memory into blocks of fixed sizes called virtual pages (VPNs. The size of each virtual page is P = 2PBytes. Similarly, physical storage is divided into physical pages (PP) with a size of P bytes (physical pages are also called page frames and page frames ).

At any time, the set of virtual pages is divided into three non-Intersecting subsets:

Unallocated: Page not allocated or created by the VM system. Unallocated blocks do not have any data associated with them, so they do not occupy any disk space.

Buffer Storage: allocated pages of the current cache in physical storage.

Uncached: No allocated pages cached in physical storage.

Because of the large Miss penalty and the overhead of the first byte of access, the virtual overhead tends to be very large, typically 4 ~ 8 KB. DRAM cache is fully connected due to large Miss penalties. That is to say, any virtual storage page can be placed on any physical page. DRAM cache always uses write back ).

1) page table

A Data Structure Stored in the physical storage is called a page table ). Page tables map virtual pages to physical pages.

A page table is an array of PTE (page table entry, page table entry. Each page in the virtual address space has a PTE at a fixed offset in the page table.

Null: not allocated.

VP3, Vp5: allocated, but not cached.

CIDR group: allocated and cached.