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The processor is composed of an operator, a controller, a series of registers , and a cache
1. Class Two registers:
User-visible Registers: high-level language compilers are allocated and used by optimization algorithms to reduce the number of times a program accesses memory
Control and status registers: Operations used to control the processor are typically used by the operation code
Common control and status registers
Program counter (Pc:program Counter) to record the address of the instruction to be removed
Instruction register (ir:insruction register) to record the most recently removed instruction
Program Status Word (Psw:program status word), record the processor's operating status code, mode, control bits and other information
2. Status of the CPU (modes mode)
Now the processor typically divides the CPU state plan into two, three, or four types of
Set a single bit specifically in the program status Word register PSW to set different CPU states based on the usage rights of the running program to resources and instructions
3. Privileged and non-privileged directives
Operating system requires two CPU states
kernel State (kernel mode): Run operating System program
User mode: Run user program
Privilege (privilege) Directives: instructions that can only be used by the operating system, which the user program cannot use
non-privileged directives: commands that the user program can use
4. Conversion between CPU states (conversion of System programs and user programs)
user state---> kernel State
the only way--- > Interrupt/exception/sink mechanism
Kernel---> User Configuration
Set Program status word PSW
a special directive: fall into the command (also known as the Visit command)
The interface provided to the user program to invoke the functionality of the operating system (service)
Second, interrupts and anomalies (operating system driving force)
1. The importance of interrupts/exceptions for the operating system
It's like: The engine of a car, the engine of a plane
It can be said that the operating system is "interrupt-driven" or "event-driven"
2. Main role
Timely processing of interrupt requests from equipment
A request that enables the OS to capture services made by the user program
Prevent disruptive activities during user program execution, etc...
3. Concepts of interrupts/anomalies
A reaction of the CPU to an event that occurs in the system, which alters the control flow of the processor
The CPU suspends the executing program, and automatically goes to the handler to execute the corresponding event after processing, and returns to the power outage to continue the interrupted program after the process is completed.
4. Why do I introduce interrupts and exceptions?
Interrupt Introduction: To support parallel operations between CPUs and devices
when the CPU boot device enters the input/output, the device can work independently, the CPU goes to handle things that are not related to this input/output, when the device completes the input/output, Report the results of this input/output via CPU interrupt, and let the CPU decide what to do with it.
5. Exception Introduction: A problem that indicates that the CPU executes the instruction itself
such as arithmetic overflow, clear 0, the number of parity errors, the visit address out of bounds or executed "into the command" and so on, At this point the hardware changes the current execution process of the CPU, goes to the appropriate error handler or exception handler, or executes a system call
6. event Partitioning
Interrupt (external interrupt): IO interrupt: Press CTRL + C on the keyboard, the network card to the package, the printer reads the end of the disk, clock interrupt: Timer to the point, Programs running on the CPU time slice, hardware failure: The notebook is not electric.
Exceptions (internal interrupts): System calls, Page faults, protective exceptions, breakpoint directives, other program exceptions (such as arithmetic overflow, and so on)
Category
|
Reason
|
Asynchronous/Synchronous
|
return behavior
|
Interrupt Interrupt |
From I/O devices, other hardware components |
Asynchronous
|
Always return to the next hop command |
Trapped in a trap |
Consciously arranged. |
Synchronous
|
Return to next instruction |
Fault fault |
Recoverable errors |
Synchronous |
Return to current instruction |
Terminating abort |
Unrecoverable error |
Synchronous |
does not return |
#中断是一种, the exception is three kinds
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2-1 Processor State (mode) interrupts and exceptions