20165206 2018-2019-1 Summary of the fifth week of Information Security System Design Basics

-20165206 2018-2019-1 Summary of the fifth week of information security system design-Summary of Teaching Materials-Random Access to memory:

• Random Access Memory is divided into two types: static RAM (SRAM) and dynamic RAM (Dram ).

• Static RAM stores each bit in a bistability memory unit, and dynamic RAM stores each bit to charge a capacitor.

• Static Ram is mainly used in high-speed cache storage; Dynamic RAM is mainly used in primary storage and frame buffer.

-Enhanced DRAM:

• Paging mode dram
• Extended Data Output dram
• Synchronous DRAM
• Double Data Rate synchronization dram
• Video dram

-Access primary storage:

The Data Stream goes back and forth between the processor and the dram primary memory through a shared electronic circuit called a bus. Each data transfer between the CPU and the primary memory is completed through a series of steps, these steps are called bus transactions. Read transactions transmit data from the primary memory to the CPU, and write transactions transmit data from the CPU to the primary memory.

-Disk:

• Disk Structure

• Disk capacity: the maximum number of BITs that can be recorded on a disk is referred to as the maximum capacity or capacity. Disk capacity is determined by several technical factors: record density, track density, and surface density.
  Calculation formula:
  

• Disk operation: the disk reads and writes data in a sector. The access time of the slice consists of the track time, rotation time, and transfer time.

• Logical Disk Block

• Access Disk

-SSD-locality:

• Locality Principle: tends to reference data items adjacent to other recently referenced data items, or recently referenced data items themselves.

• There are two types of locality: temporal locality and spatial locality.

• Locality of Program Data Reference

• Locality of the command

-Memory Hierarchy

• The central idea of the storage hierarchy is that for each K, faster and smaller storage devices located on the K + 1 layer cache larger and slower storage devices.

-Cache storage:

• The storage structure of early computer systems was only three layers: CPU registers, DRAM primary memory, and disk storage.

• General high-speed cache memory organization structure: the high-speed cache structure can be described using tuples (S, E, B, m. The cache size C refers to the sum of the sizes of all blocks. The flag and valid bits are not included. Therefore, c = sEB.
  

• Direct ing high-speed cache: each group has only one row (E = 1) of high-speed cache, which is called direct ing high-speed cache.

• The high-speed cache determines whether a request is hit, and then extracts the requested word. There are three steps: group selection, row matching, and word extraction.

-Storage Hill:

A two-dimensional function of the time and space locality of read bandwidth is called the storage Mountain. Each computer has a unique storage mountain that shows its memory system capabilities.

-Y86 simulator Installation

• Download the y86 simulator;
• Install the lexical analysis tool in Linux. The installation command is:

sudo apt-get install bison flex

• The installation of Tcl/tk supports graphical interfaces. The installation command is:

sudo apt-get install tcl8.5-dev tk8.5-dev tcl8.5 tk8.5

• Find a directory with a sim.tarcompressed package and decompress the sim.tar package in the current directory. Manually decompress the package or enter the extract command on the terminal. Decompress the command:

tar xf sim.tar

• Find and modify the mkaefile file in the sim folder. The changes are as follows:
  

• Go to the sim folder for compilation. Input command:

make cleanmake

• Graphic Interface for running

Take pism as an Example
Go to the pism folder and run the graphic interface. Input command:

./psim -t -g ../y86-code/asum.yo

Reference blog: y86 Simulator

-Last week's summary-Wrong question 1: Y86-64 () instructions are not stored access operation.

A.
Rrmovl
B.
Irmovq
C.
Rmmovq
D.
Pushq
E.
Jxx
F.
RET

• Answer: A B E

20165206 2018-2019-1 Summary of the fifth week of Information Security System Design Basics