2018-2019-1 20165336 "Foundation of Information Security System Design" 5th weekly study summary

2018-2019-1 20165336 "Information Security System Design Basics" week 5th Study Summary 1. learned knowledge points

• SRAM and DRAM are both easy to lose, but they have different structures, different speeds, and faster access speed.
• The prom can only be programmed once.
• Programs stored in ROM devices are usually called firmware.
• The EEPROM can erase the information on the chip with a specific voltage without ultraviolet radiation or removal, so as to write new data.
• Loop statements in the program have good locality
• The LRU policy indicates that the cache of the replacement policy will select the block with the maximum access time.
• When the cache is not killed, it is determined which block is sacrificed and controlled by the replacement policy.
• An empty cache miss is a mandatory miss or a cold miss.
• Based on the carrying signal, the bus can be divided into data bus, address bus, control bus
• The disk reads and writes data in slices.
• The access time to the disk sector consists of three parts, with the minimum transfer time.
• The read/write headers are always in the same cylinder.

• Memory Hierarchy
  

• By using two clock edges as the control signal, the dram is enhanced by the DDR SDRAM
• The CPU sends commands to the I/O device through memory ing. The DMA transmission does not require CPU interference. SSD is a storage technology based on flash memory or flash, the logical block number of A Logical Disk can be translated into a triple (disk, track, or sector.
• When a program accesses a vector, the smaller or shorter the step size, the better the space locality.
• There are two types of locality: spatial locality and temporal locality.
• Hardware, OS, and applications all use local principles.
• The disk is read in milliseconds.
• The disk surface is composed of tracks.
• Each disk has multiple surfaces and, although the area is different, the number of data bits is the same
• A drive has three disks and six sides. The number of the track on each surface is the same. Then, the cylinder K is the set of six tracks K.
• Storage layers involve storage devices with different capacities, costs, and access times
• Storage hierarchy design is based on local principles
• "Storage Mountain" is a function of temporal locality and spatial locality.
• The program has a good locality, and tends to access data from a higher level in the memory hierarchy.
• SRAM and DRAM are not non-volatile storage. SRAM stores a bit in a bistability storage unit, while DRAM generally uses a capacitor as the storage unit. DRAM needs to be refreshed once every 2 ms to avoid data loss while SRAM is static and does not need to be refreshed. SDRAM only transmits data once in a clock period. It transmits data only once during the clock rising period, while the DDR memory transfers data twice in a clock period, it can transmit data once each time during the rising and falling phases of the clock, so it is called double rate synchronous dynamic random memory. DRAM generally uses capacitors as storage units. DRAM is faster than SRAM. DRAM needs to be rewritten and refreshed.
• The cache capacity can be calculated using C = Seb.
• Direct ing of High-speed cache: group selection, row matching, and word Extraction

• When the program accesses an array with a power of 2, conflicts or hits often occur when directly mapped to the high-band cache.

Summary of incorrect questions

1. Which of the following statements about cache is true? (ACD)
A. the cache capacity can be calculated using C = Seb.
B. the cache capacity is 2048, And the cache structure is (32, 8, 8, 32)
C. Direct ing to high-speed cache: group selection, row matching, and word Extraction
D. When the program accesses an array with a power of 2, conflicts and hits often occur during direct ing to the high-band cache.
Resolution:
A: The composition structure of the cache is generally divided into S groups, each group contains e rows, and one row contains B bytes of data. Therefore, the overall capacity is c = Seb.
B: When the cache capacity is 2048, the cache structure is (32), 8, 8, 32), rather than (32, 8, 32 ).
C: Direct ing of High-speed cache, group-connected high-speed cache, full-link high-speed cache, group selection, row matching, word extraction, and row replacement policy when no hit is found.
D: Direct ing, high-band cache, usually conflict or miss

2. Calculate the following disk capacity (): 4 disks, 100000 cylinders, 400 sectors per track, 512 bytes per sector
A. 81.92 GB
B. 40.96 GB
C. 163.84
D. 327.68 GB
Correct answer: c
Resolution: disk capacity = Number of cylinders * Number of disks * number of sectors * number of bytes. Therefore, the calculation process is as follows: 41000004005122/1000000000 = 163.84

3. Which of the following statements about Ram is true ()
A. the contents in the files cannot be saved after power-down of SRAM and dram.
B. DRAM stores a bit in a bistability storage unit.
C. In general, SRAM is faster than dram
D. SRAM is often used for high-speed cache
E. DRAM stores each bit to charge a capacitor
F. SRAM needs to be refreshed constantly
G. DRAM is organized into two-dimensional arrays instead of linear arrays.
Correct answer: A c d e g

2018-2019-1 20165336 "Foundation of Information Security System Design" 5th weekly study summary