2.3 Stm32 transplant lwIP Frequently asked questions and solutions

1.PHY initialization
In general, the STM32 External drive PHY chip has two connection modes, MII and Rmii bus, which is related to hardware design, but STM32 chip generally support the two bus connection mode, because the Rmii bus in the case of the transmission effect is not changed, the use of fewer interfaces, so generally recommended rmii way .
Take DP83848 chip as an example:

   From the above can be seen rmii bus corresponding input clock to be set to 50MHZ, of course, this with your schematic wiring has, connection PHY chip X1 interface corresponding GPIO interface peripheral area Clock is set to this value, considering the hanging in the same area peripheral clock requirements, in order to facilitate the design, For STM32F207VET6 (the chip I use), change the system clock from 120MHz to 100MHz, the area peripheral clock is set to 1/2. For STM32F107VC, you need to pull the peripheral clock of the area up to 50Mhz via PLL3.
   For the most part, most people are using the official routines directly for stm32-driven transplants, and few people are going to discuss the meaning of each configuration, and the general situation will certainly not be a problem, but it's hard to say in terms of complexity, so I suggest reading each one carefully and customizing it against the reference manual. The Stm32 chip is also very fastidious about the operation of the ETH.
   In fact, the default driver has one of the biggest problems, that is, when the boot is not plugged in the network cable, will start failure and not be able to work properly, if you study the function of the official library, you can easily solve this problem, I would like to organize the drive part of the functions and comments written up, I hope it helps.

Eth_deinit (); /*Software Reset*/Eth_softwarereset (); /*Wait for software reset*/   while(Eth_getsoftwareresetstatus () = =SET); /*ETHERNET Configuration---------------------------------------------*/  /*Call Eth_structinit If you don ' t like to configure all eth_initstructure parameter*/Eth_structinit (&eth_initstructure); /*Fill eth_initstructure parametrs*/  /*------------------------ETH_MACCR-----------------------------------*/    //parameter is automatically configured, select disable need to automatically configure the dictation parameters (Auto mode will cause timeout when the network cable is not plugged in, initialization fails)Eth_initstructure.eth_autonegotiation =eth_autonegotiation_disable; Eth_initstructure.eth_watchdog= eth_watchdog_disable;//turn off the watchdog timer to allow the reception of extra long framesEth_initstructure.eth_jabber = eth_jabber_disable;//turn off the Jabber timer to allow the sending of extra long framesEth_initstructure.eth_interframegap = Eth_interframegap_40bit;//send inter-frame gapEth_initstructure.eth_speed = eth_speed_100m;//Fast Ethernet SpeedEth_initstructure.eth_loopbackmode = eth_loopbackmode_disable;//do not enable self-looping modeEth_initstructure.eth_mode = Eth_mode_fullduplex;//Full Duplex mode      /*autofill/CRC Stripping processing does not execute, forwards all frames*/Eth_initstructure.eth_automaticpadcrcstrip=eth_automaticpadcrcstrip_disable; #ifChecksum_by_hardwareEth_initstructure.eth_checksumoffload= eth_checksumoffload_enable;//IPV4 header file hardware checksum#endif    /*------------------------ETH_MACFFR----------------------------------*/Eth_initstructure.eth_receiveall= eth_receiveall_disable;//MAC filtering only accepts data through the source destination addressEth_initstructure.eth_sourceaddrfilter = eth_sourceaddrfilter_normal_enable;//Mac Filter Source address error frame? Eth_initstructure.eth_passcontrolframes = Eth_passcontrolframes_blockall;//Mac does not forward any control framesEth_initstructure.eth_broadcastframesreception = eth_broadcastframesreception_enable;//Receive broadcast framesEth_initstructure.eth_destinationaddrfilter = Eth_destinationaddrfilter_normal;//Destination Address filtering results are normalEth_initstructure.eth_promiscuousmode = eth_promiscuousmode_disable;//promiscuous mode, enable frame filteringEth_initstructure.eth_multicastframesfilter = Eth_multicastframesfilter_perfect;//filter works without transmitting control frameEth_initstructure.eth_unicastframesfilter = Eth_unicastframesfilter_perfect;//Unicast Frame Destination address perfect filtering   /*------------------------DMA eth_dmaomr-----------------------------------*/     /*When we use the Checksum offload feature, we need to enable the store and Forward mode:the store and Forward Guar Antee that a whole frame was stored in the FIFO, so the MAC can insert/verify the checksum, if the checksum is OK the DM A can handle the frame otherwise the frame is dropped*/    /*Discard checksum error frame does not execute (because hardware checksum is not performed)*/Eth_initstructure.eth_droptcpipchecksumerrorframe=eth_droptcpipchecksumerrorframe_disable; Eth_initstructure.eth_receivestoreforward= eth_receivestoreforward_disable;//receive data exceeds threshold forwardingEth_initstructure.eth_flushreceivedframe = eth_flushreceivedframe_enable;//empty FIFO when descriptor is occupied and the receive FIFO is not available (resolves blocking)Eth_initstructure.eth_transmitstoreforward = eth_transmitstoreforward_disable;//Send data Full frame forwardingEth_initstructure.eth_transmitthresholdcontrol = eth_transmitthresholdcontrol_64bytes;//Send threshold value is 64BytesEth_initstructure.eth_forwarderrorframes = eth_forwarderrorframes_disable;//receive FIFO discards all error frames        /*receive a good frame with insufficient FIFO upload length*/
　　Eth_initstructure.eth_forwardundersizedgoodframes=eth_forwardundersizedgoodframes_enable;
Eth_initstructure.eth_receivethresholdcontrol= Eth_receivethresholdcontrol_64bytes;//receive threshold is 64Bytes
Eth_initstructure.eth_secondframeoperate = eth_secondframeoperate_enable;//DMA sends a second frame directly, no previous frame reply is required        /*------------------------DMA ETH_DMABMR-----------------------------------*/Eth_initstructure.eth_addressalignedbeats= eth_addressalignedbeats_enable;//Transport Address AlignmentEth_initstructure.eth_fixedburst = eth_fixedburst_enable;//Fixed BurstEth_initstructure.eth_rxdmaburstlength =eth_rxdmaburstlength_32beat; Eth_initstructure.eth_txdmaburstlength=eth_txdmaburstlength_32beat; Eth_initstructure.eth_dmaarbitration= Eth_dmaarbitration_roundrobin_rxtx_2_1;//transmit and receive ratios (important when uploading data) 2:1      /*Configure Ethernet*/Eth_init (&eth_initstructure, dp83848_phy_address); /*enable the Ethernet Rx Interrupt only enable receive interrupts*/Eth_dmaitconfig (Eth_dma_it_nis|Eth_dma_it_r, ENABLE);

Of course, this is my own configuration according to the needs of the specific project because the actual transmission of different needs of personal modification is also necessary.

Modification of lwipopt.h file in 2.lwip

In reference to the previous section, understanding is the basis to be able to modify.

3. Non-completion of the adjournment

2.3 Stm32 transplant lwIP Frequently asked questions and solutions