3nand flash transplantation of bootloader---23.u-boot-2010.06-rc1 transplantation

Add NAND Flash Features
After the normal boot serial can be displayed, the next transplant is NAND flash 1. The initialization of NAND Flash is in ARCH/ARM/LIB/BOARD.C ARCH/ARM/LIB/BOARD.C
Start_armboot
{
#if defined (Config_cmd_nand)
Puts ("NAND:");
Nand_init (); /* Go init the NAND * *
#endif
So you need to add in Include/configs/smdk2410.h: #define Config_cmd_nand 1

Initialization of 2.nand
#ifndef config_sys_nand_base_list #define Config_sys_nand_base_list {config_sys_nand_base} #endif static ULONG Base_ Address[config_sys_max_nand_device] = config_sys_nand_base_list; Base_address initialized to Config_sys_nand_base so you need to add it in Include/configs/smdk2410.h: #define Config_sys_nand_base 0x4E000000 void Nand_init (void) {
int i;
unsigned int size = 0;
for (i = 0; i < Config_sys_max_nand_device i++) {//config_sys_max_nand_device=1 So it only takes one nand_init_chip//initialization of Nan         D nand_init_chip (&nand_info[i], &nand_chip[i], base_address[i]); Size + = nand_info[i].size/1024;
if (Nand_curr_device = = 1)
Nand_curr_device = i;
}
printf ("%u mib\n", size/1024); }


3. DRIVER/MTD/NAND/NAND.C L42 static void Nand_init_chip (struct mtd_info *mtd, struct nand_chip, *nand,
ULONG base_addr)
{
int maxchips = config_sys_nand_max_chips;
int __attribute__ ((unused)) i = 0;

if (Maxchips < 1)
Maxchips = 1;
Mtd->priv = NAND; I'm going to use NAND to control the bottom register, so it's important to save NAND here first.

Nand->io_addr_r = Nand->io_addr_w = (void __iomem *) base_addr;//Initialize read-write pointer to 0x4e000000, the pointer will change after true read and write
if (board_nand_init (NAND) = = 0) {//board_nand_init Register paper other initialization if (Nand_scan (MTD, maxchips) = = 0) {//
if (!mtd->name)
Mtd->name = (char *) default_nand_name;
else Mtd->name = NULL;
} else {
Mtd->name = NULL;
mtd->size = 0;
}

} 4. Drivers/mtd/nand/s3c2410_nand.c
int board_nand_init (struct nand_chip *nand)
{
u_int32_t CFG;
u_int32_t CNT;
u_int8_t tacls, Twrph0, TWRPH1;
struct S3c2440_nand *nand_reg = S3c2440_get_base_nand ();

DEBUGX (1, "board_nand_init () \ n");

/* Initialize HARDWARE * * tacls = 0;
Twrph0 = 4;
TWRPH1 = 2;

CFG |= s3c2440_nfconf_tacls (TACLS);
CFG |= s3c2440_nfconf_twrph0 (twrph0);
CFG |= s3c2440_nfconf_twrph1 (TWRPH1);
Writel (CFG, &nand_reg->nfconf);

NAND Flash Control Register