4 modes of operation of the SPI bus

The 4 operating modes of the SPI bus 0 to 4 Modesspi interface is the full name of "Serial peripheral Interface", meaning the serial peripheral interface, Motorola first defined on its MC68HCXX series processor. The SPI interface is used primarily in eeprom,flash, real-time clocks, ad converters, and digital signal processors and digital signal decoders.

The SPI interface is a synchronous serial data transfer between the CPU and the peripheral low-speed device, in the shift pulse of the main device, the data is bit-transmitted, high in front, position behind, for full-duplex communication, the data transmission speed is generally faster than the I²C bus, the speed can reach a few Mbps.

The SPI interface is a master-slave operation, which typically has one main device and one or more slave devices, and the interface consists of the following four signals:

(1) mosi– master device data output, from device data input
(2) miso– Master device data input, from device data output
(3) sclk– clock signal, generated by the main device
(4)/ss– from the device enable signal, controlled by the main device 

In point-to-point communication, the SPI interface does not require addressing, and it is simple and efficient for full-duplex communication.
In multiple slave device systems, each slave device requires a separate enable signal, which is slightly more complex than the I²C system on the hardware.

The SPI interface in the internal hardware is actually two simple shift registers, the transmitted data is 8 bits, the main device generated from the device enable signal and the shift pulse, the bitwise transmission, high position in front, low post. As shown, data changes on the falling edge of the SCLK, while a data is stored in a shift register.

 

Internal hardware diagram for SPI interface:

Finally, one drawback of the SPI interface is that there is no flow control specified, and there is no response mechanism to confirm receipt of the data.

4 Modes for 4 clock settings, one setting is the clock idle in the high or low state, the other setting data is on the rising edge of the clock or falling along the latch, 2x2=4 species

4 modes of operation of the SPI bus