51 single chip microcomputer clock and bus timing and bus expansion

Speaking of the 51 MCU clock first thought about 51 o'clock how to work. Micro-controller to work must have a "power", for 51 single-chip microcomputer, this "power" is the clock source. A 12MHz crystal oscillator is used as the clock source for general applications.

Generally the first method is used more often. When the internal oscillation mode is selected, there are two small capacitors next to the crystal oscillator. These two capacitors are called crystal vibration load capacitance, respectively, connected to the crystal oscillator two feet and the capacitance to the ground, generally in dozens of pi hair. It affects the resonant frequency and output amplitude of the crystal oscillator. The load capacitance of the crystal oscillator =[(CD*CG)/(CD+CG)]+cic+ C-type CD,CG in the crystal is connected to the two feet and the ground capacitor, Cic (IC internal capacitance) + C (PCB capacitance) experience is 3 to 5PF.
The crystal pins of various logic chips can be equivalent to the capacitance three-point oscillator. The inside of the crystal pin is usually an inverter, or an odd number of inverter in series. Between the crystal output pin XO and the crystal input pin XI is connected with a resistor, for the CMOS chip is usually a few m to dozens of m between Europe. Many of the pins inside the chip already contain this resistor, and the outside of the pin is not connected. This resistor is intended to allow the inverter to be in a linear state at the initial oscillation point, and the inverter acts as an amplifier with a large gain for the purpose of starting the oscillator.
Why Choose 12MHz Crystal oscillator as the clock source?
This is to say 51 MCU internal several cycles: instruction cycle, machine cycle, clock cycle, oscillation cycle.
The oscillation period is the period of the oscillation source which provides the timing signal for the microcontroller or the cycle of the external input clock.
The clock cycle, also known as the state cycle or state time S, is twice times the oscillation period, divided into P1 beats and P2 beats, which usually perform arithmetic logic operations in the P1 beats, which completes the data transfer operation between the internal registers in the P2 beats. (Note the phase relationship of P1 and P2)
A machine cycle consists of 6 states, and if the execution of one instruction is divided into several basic operations, the time required to complete a basic operation is called the machine cycle. Single-chip microcomputer single-cycle instruction execution time is a machine cycle.
The instruction cycle is the entire time required to execute an instruction. The instruction cycle of MCS-51 MCU is usually composed of 1, 2 and 4 machine cycles.
For the 12MHz Crystal Oscillator, it provides a 12M oscillation period, a 6M clock cycle, and a 1M machine cycle. So at this time 51 single-chip microcomputer single instruction period is (1/1m) s=1us. What's the advantage of this 1us? You will know that the microcontroller application will have a variety of timing, many times it is necessary to use a small program delay to achieve timing requirements, and 1us single instruction cycle more convenient to calculate the delay time and determine the execution time of each statement. It should be clear that the single-chip microcomputer to execute each statement time is very certain, is 1us is 1us not a little bit less.
The following is the 51 single-chip bus extension:

This structure is the three-bus structure mentioned in the previous article, as shown in the figure
1. Data bus
51 MCU data bus is P0 port, the CPU is sent from P0 port and read back data.
2. Address bus
The address bus for the 51 series microcontroller is 16 bits.
In order to save the chip pin, using the P0 port multiplexing method, in addition to as a data bus, in the ale signal timing matching, through the external data latch, in the first half of the bus access from the P0 port to send a low 8-bit address, the second half cycle from the P0 port to send 8-bit data.
The high 8-bit address is sent through the P2 port.
3. Control Bus
51 Series MCU control bus includes (RD) Read control signal P3.7 and (WR) write control signal P3.6, respectively, as the bus mode data read and data write enable signal.
51 MCU bus timing is shown in the figure.

As can be seen from Figure 2, the completion of a bus (read and write) operation cycle is t,p0 port time multiplexing, during T0, the P0 Port sent a low 8-bit address, the ale dropped along the edge of the data latch, sent a low 8-bit address signal. During T1, the P0 port is used as a data bus, which is sent or read, and the read and write operation of the data is completed during the low level of the read and write control signals.
It should be noted that during the control signal (read, write signal) active, the P2 port sends a high 8-bit address, with the data latch output of the low 8-bit address, to achieve the 16-bit address bus, that is, the 64kB range of addressing within.
Because the CPU cannot perform both read and write operations, the read and write signals cannot be valid at the same time.
The use of this bus structure in accordance with the specified timing can maximize the use of the microcontroller's entire address line. This is the single-chip computer address. The address is divided into line selection method and decoding method, decoding method is divided into full decoding and partial decoding. The advantage of line selection method is simple but very wasteful address line, full decoding method can maximize the use of all address lines, but the circuit is very complex need some and non-gate coordination. In general, partial decoding method is the most cost-effective, especially when the memory chip is external to the partial decoding method is very convenient.