A simple method of compiling-makefile for multi-file engineering

　Usually we use GCC to compile the program at the command line, if it is convenient for a single file or several files, but when the files in the project are increasing or even becoming very large, the use of GCC is obviously inadequate and poorly managed. So it is necessary for us to write a makefile to manage the project. Learn about the following engineering catalogs.

Generate an executable program Cacu, set up the following rules for the makefile file.

#生成test,":"The left side is the target and the right side is dependent. GCC is command cacu: add_int.o add_float.o sub_int.o sub_float.o main.oGCC-OCacuADD/ADD_INT.O add/ADD_FLOAT.O \ (connector) SUB_INT.O sub_float.o main.o #生成add_int. O Rules add_int.o:add/add_int.c add/add_int.hGCC-c-o ADD/ADD_INT.O add/add_int.c rules for #生成add_float. O Add_float.o:add/add_float.c add/add_float.hGCC-c-o ADD/ADD_FLOAT.O add/add_float.c# rules for generating SUB_INT.O sub_int.o:sub/sub_int.c sub/sub_int.hGCC-c-o SUB/SUB_INT.O sub/sub_int.c# rules for generating SUB_FLOAT.O sub_float.o:sub/sub_float.c sub/sub_float.hGCC-c-o SUB/SUB_FLOAT.O sub/sub_float.c# rules for generating MAIN.O main.o:main.c add/add.h sub/Sub.hGCC-c-o MAIN.O Main.c-iadd-isub# Cleanup rules clean:RM-F Test add_int.o add_float.o sub_int.o sub_float.o main.o

rules of Makefile:
The makefile framework is made up ofRule Composition, when the make command executes, it first looks for various rules in the makefile file and then runs the rules after parsing the various rules. The basic format of the rule is
TARGET ... : Dependeds ...
COMAND
......
......
Target: The goal defined by the rule. Usually the rule is the file name of the last generated executable file or the target file to be relied on to generate the executable file, or it can be an action called. Pseudo-target.
Dependeds: The dependency conditions that are necessary to execute this rule, such as the target file that generates the executable file. The dependeds can also be a target, which creates a nesting between target.
Command: The commands that the rule executes, that is, the actions of the rule, such as compiling a file, building a library file, entering a directory, and so on. The action can be multiple, with each command occupying one line. The form of rules is relatively simple, to write a makeele need to pay attention to some places, and the implementation of the process of understanding.

1. Writing of rules
In writing the rules, in order for make to rent e clearer, use a backslash (\) to break longer lines into multiple lines, such as "Rm-fcacu add/add_int. O add/add_tloat. o sub/sub_int. O sub/sub_float. o Main. o "decomposition for two lines. The command line must start with the TAB key, and the M-work program handles all successive tab-key lines that appear after a rule as the command line.
Note: When writing a rule, be aware of the command's position, and the blank in front of the command is a tab key, not a space. Tab tells make that this is a command line and make performs the corresponding action.

2. Target
The target of a makefile can be a specific file, or it can be an action. For example, Target cacu is the rule that generates CACU, there are many dependencies, and related command actions. Clean is an action that clears the current build file and does not generate any target items.

3. Dependencies
A dependency is a condition that must be met by a target build, such as a command that generates a CACU that relies on MAIN.O,MAIN.O must exist to perform a build cacu, that is, the action of a dependency executes before the command of target. The order of dependencies is checked or executed in order from left to right. For example, the following rules

Main. o Main. C Add/add. H sub/sub. H
Gcc-c-o Main. o Main. C-ladd-isub
MAIN.C, Add/add.h, and sub/sub.h must all exist to perform the action. GCC-C-OMAIH.O main.c-ladd-lsub. , when Add/add.h does not exist, it does not execute the command action of the rule, and does not check the existence of the Sub/sub.h file, of course main.c because it is not a problem to be confirmed before add/add.h dependency.

4. Nesting of rules
Rules can be nested, typically through dependency implementations. For example, the rules that generate CACU depend on a lot of. o files, and each. o file is a rule respectively. To execute a rule cacu must first execute its dependencies, i.e.
ADD_INT.O, ADD_FLOAT.O, SUB_INT.O, SUB_FLOAT.O, MAIN.O, these 5 dependencies are generated or exist before the CACU command action.

5. Timestamp of the file
When the make command executes, it determines whether the relevant command is executed based on the timestamp of the file and executes the rules that depend on it. For example, the Main.c file is modified and saved, the file generation date has changed,
When compiling with the Make command, it compiles only main.c, and executes the rule Cacu and relink the program.

6, the implementation of the Rules
When the Make command is compiled, the M-project will look for the 1th rule in the Makeele file to analyze and perform the related actions. The 1th rule in the example is Cacu, so M-engineering executes the CACU rule. Because its dependencies contain 5, the 1th is ADD_INT.O, parsing its dependencies, and when Add/add_int.c Add.h exists, perform the following command action:

Gcc-c-o addladd_int. o add/add_int. C

When the command is completed, the 2nd dependency is executed sequentially, generating the add/add_ FLAOT.O. When the 5th dependency is satisfied, that is, when MAIN.O is generated, the CACU command is executed, and the link is delivered to the execution file Cacu. When you put the rule clean to the first, then the make command does not generate the Cacu file, but cleans the file. To generate the Cacu file you need to use the Make command as follows.

Debain #make Cacu

7. Pattern matching

In the above makefile, the MAIN.O rules are written in the following way

Main. O:main. C Add/add. H sub/sub. H
Gcc-c-o Main. o Main. C-iadd-isub

There is an easy way to achieve the same functionality as above

Main. O:%o%c
Gcc-c $<-o [email protected]

The rules for this method are MAIN.O in the dependencies. %o:%c. The role of the TARgetExtension of the. O of the domain
The name is replaced by. C, and the MAIN.O is replaced with MAIN.C. The command line's s〈 represents the result of the dependency, which is [email protected]
Represents the name of the target domain, which is main.o.

Using user-defined variables in makefile

Define the OBJS variable to represent the target file:

OBJS = add_int.o add_float.o sub_int.o sub_float.o main.o

Add $ before calling Objs, and the name of the variable can be enclosed in parentheses. For example, by using the default rules for GCC to compile, CACU rules can take the form of the following

Cuca:gcc-o Cacu $ (OBJS)

Use CC for GCC, cflags for compile options, RM for Rm-f, and target for final build target Cacu.

CC = GCC (cc defined as GCC)
CFLAGS =-isub-iadd (Join header File search Path Sub,add folder)
target = Cacu (the final generated target)
RM = rm-f (Deleted command)

In this way, the previously lengthy makefile can be simplified to the following form.

1CC =GCC2CFLAGS =-isub-iadd-O2 (O2 for optimization)3OBJS =add_int.o add_float.o sub_int.o sub_float.o main.o4TARGET =Cacu5RM =RM-F6 $ (TARGET): $ (OBJS)7$ (CC)-o $ (TARGET) $ (OBJS) $ (CFLAGS)8$ (OBJS):%.o:%. C (Replace all files with the. o extension in objs with files with the. c extension)9$ (CC)-C $ (CFLAGS) $<-o [email protected] (generate target file)Ten Clean : One-$ (RM) $ (TARGET) $ (OBJS)-Indicates ignore error

Since the default value for CC is CC,RM, the default value is Rm-f, so if the variable is not explicitly defined when the variable is called, the compiler will call its default value. After simplification, the following forms can be obtained:

 1  CFLAGS =-isub-iadd-o2 (O2 for optimization)  Span style= "color: #008080;" >2  objs = ADD_INT.O add_float.o sub_int.o sub_float.o main.o  3  TARGET = Cacu  4  $ (target): $ (OBJS)  5  $ (CC)-o $ (TARGET) $ (OBJS) $ (CFLAGS)  6  $ (OBJS):%.o:%.c ( Replace all files with the. o extension in objs with files with the. c extension  7  $ (CC)-C $ (CFLAGS) $<-o [email protected] (Generate target file)  8   Clean:  9 -$ (RM) $ (TARGET) $ (OBJS)-Indicates ignore error 

Makefile is smart (automatically deduced, using the default method to generate the target file), can be simplified, you can get the following form:

1 CFLAGS =-isub-iadd-O2 (O2 for optimization)2 objs = add_int.o add_float.o sub_int.o sub_float.o mai N.O3 TARGET = cacu4  $ (target): $ (OBJS)5 $ (CC)-o $ (target) $ (OBJS ) $ (CFLAGS)6clean  :7 -$ (RM) $ (TARGET) $ (OBJS)-Indicates ignore error

Makefile of the profound, temporary study here (to be continued) ....

A simple method of compiling-makefile for multi-file engineering