A tentative study of ecos redboot restart command: RESET

Environment parameter: ecos Template: Redboot hardware platform: STM32F103ZET6

1, reset implementation of the function call flowthe functions that correspond to the Reset command are:packages/redboot/current/src/main.c

void Do_reset (int argc, char *argv[]) {    diag_printf ("... resetting. ");    Cygacc_call_if_delay_us (2*100000);    diag_printf ("\ n");    Cygacc_call_if_reset ();    DIAG_PRINTF ("!! Oops, RESET not working on this platform\n ");}

Cygacc_call_if_reset (); macro defined in:
packages/hal/common/current/include/hal_if.h

#define CYGACC_CALL_IF_RESET ()    cygacc_call_vv0 (__call_if_reset_t*, Cygnum_call_if_reset) ()   __call_ VoidVV0 (Cygnum_call_if_reset, __call_if_reset_t, void)

and finally called the static void reset (void) function: Packages/Hal/common/current/ include /HAL_IF.C

static __call_if_reset_t reset;static void Reset (void) {    cygarc_hal_save_gp ();    With luck, the platform defines some magic that would cause a hardware    //reset. #ifdef hal_platform_reset    HAL_PL Atform_reset (); #endif #ifdef hal_platform_reset_entry//If that's not a case    (above was an empty statement) there may    //Be defined a address we can jump To-and effectively    //reinitialize the system. Not quite as good-a reset, but it    //is often enough.    Goto *hal_platform_reset_entry; #else #error "No reset_entry" #endif    cyg_fail ("RESET failed");    CYGARC_HAL_RESTORE_GP ();}

This function shows that the implementation of reset has two ways:(1) Call the Hal_platform_reset () function provided by the platform(2) direct goto to the program entry address Hal_platform_reset_entry:

#define Hal_platform_reset_entry &HAL_RESET_VSR

HAL_RESET_VSR points to the main entry function of the program void Hal_reset_vsr (void), with respect to the function, the comment is described as follows:

==========================================================================//Main Entry point////Enter here from Reset via slot 1 of VSR table. The stack pointer is//already set to the value in VSR slot 0, usually the top of the internal//SRAM.

The following emphasis on the first (1) Reset mode, it involves the specific operation of the chip.

2, reset implementation involves the hardware operation
refer to the following to compare the diagram:AIRCR: Application interrupt and reset control register
as defined by the AIRCR register definition, in cortex-m3, there are two ways to perform a software reset: (1) vectreset (aircr[0]) via position AIRCR:In this way, the scope of the reset covers the entire CM3, but does not affect all other circuitry other than the core, so the on-chip peripherals and other circuitry are unaffected. (2) sysresetreq (aircr[2]) via position AIRCR:In this way, the reset operation affects the circuit on the entire chip.
3, the implementation of reset on the Redboot
The Hal_platform_reset () macro is implemented as follows:

#define HAL_PLATFORM_RESET ()                                            {                                                                           hal_write_uint32 (CYGARC_REG_NVIC_BASE+CYGARC_REG_NVIC_AIRCR,                             CYGARC_ reg_nvic_aircr_key|                                              CYGARC_REG_NVIC_AIRCR_SYSRESETREQ);                   for (;;);                                                            }

Hal_write_uint32 (_register_, _value_) function is to set the Register @ _register_ assignment @ _value_
here:

_register_ = CYGARC_REG_NVIC_BASE+CYGARC_REG_NVIC_AIRCR = 0xe000e000 + 0xd0c = 0xe000ed0c_value_ = CYGARC_REG_NVIC_AIRCR _key | Cygarc_reg_nvic_aircr_sysresetreq = (0x5fa<<16) + (1<<2)

0X5FA is the key that accesses the register.
for (;;); The dead loop guarantees that the subsequent instruction is not executed.

A tentative study of ecos redboot restart command: RESET