For beginners, why not control the output when using PB3 and PB4.
The following is an analysis of this issue.
First, after the STM32F10X series MCU is reset, the PA13/14/15 & PB3/4 is configured as a JTAG feature by default. Sometimes in order to make full use of the resources of the MCU I/O port, these
The port is set to a normal I/O port. Here's how:
In Gpio_configuration (); Configure the GPIO ports used:
Gpio_pinremapconfig (gpio_remap_swj_disable, ENABLE);
//change the mapping of the specified pin gpio_remap_swj_disable SWJ completely disabled (jtag+ SW-DP)
Gpio_pinremapconfig (gpio_remap_swj_jtagdisable, ENABLE);
//change the mapping gpio_remap_swj_jtagdisable of the specified PIN, JTAG-DP Disable + SW-DP enable
gpio_initstructure.gpio_pin = Gpio_pin_3 | Gpio_pin_4;
gpio_initstructure.gpio_speed = Gpio_speed_50mhz;
gpio_initstructure.gpio_mode = gpio_mode_out_pp;
gpio_init (GPIOB, &gpio_initstructure);
gpio_initstructure.gpio_pin = Gpio_pin_11 | Gpio_pin_12 | gpio_pin_13;
gpio_initstructure.gpio_speed = Gpio_speed_50mhz;
gpio_initstructure.gpio_mode = gpio_mode_out_pp;
gpio_init (Gpioa, &gpio_initstructure);
Note: Do not forget to turn on the rcc_configuration clock in Afio (),
//afio Clock
rcc_apb2periphclockcmd (Rcc_apb2periph_afio, ENABLE);