Generally, on the X86 platform, there are two main methods to access the registers in this range: 1. Configuration mechanism 1 # or configuration Mechanism 2 # Use the in/out command for access. Note that this method is different from the general in/out command to access the pci I/O space. It introduces the address port and data port. Configuration Mechanism 2 # used only on some specific motherboard. The new design should use configuration mechanism 1 # To generate physical operations on the configuration space. This mechanism uses two specific 32-bit I/O spaces, cf8h and cfch. These two spaces correspond to the two registers of the PCI bridge. When the Bridge Road sees that the CPU performs double-word operations on the two I/O spaces on the local bus, the I/O operation is changed to the configuration operation of the PCI bus. Register cf8h is used to generate the address (CONFIG-ADDRESS) of the configuration space, register cfch is used to save read/write data (CONFIG-DATA) of the configuration space ). The bus number, device number, function number, and register number that will access the configuration space register are written to the configuration address port (CF8H-CFBH) in a two-character format, followed by the configuration data port (cfch) to write data to the configuration data port, that is, to write data to the configuration space, to read data from the configuration data port, that is, to read data from the configuration space. 2. the mov command is used for memory ing access, just like accessing regular physical memory. The registers in the PCI configuration space are assigned to the physical memory space of the system. on x86 systems that support ACPI specifications, the operating system reads the mcfg table to obtain the base address of the PCI configuration space of all devices in the system. During boot, the operating system enumerates the PCI device to know the bus, device, and function numbers of each PCI device. With the BDF numbers and the base address obtained from mcfg, the IP address of the PCI configuration space in the physical memory space of the given device can be calculated. So what are the purposes and differences between the two access methods on x86?
- First, the configuration mechanism #1 can only access registers between [0-255] offsets, that is, registers in the standard PCI configuration space. Registers that expand the PCI configuration space [256-4095] can only be accessed using memory ing.
- Second, configuration mechanism #1 is generally used to enumerate the PCI device phase during operating system boot. At this time, the system tries to read the registers in the PCI configuration space for each possible BDF in the address space of BDF, if the device can be read successfully, the device is considered to exist. If the error code of all 1 is returned, the device does not exist. Obviously, the memory ing method cannot be used in this phase, because you can use the configuration mechanism #1 to access BDF that does not correspond to the actual physical device, the worst case is to get the error code of all 1. However, when using the memory ing method, an exception occurs when accessing a non-existent physical address.
- Finally, some legacy PCI devices or bridges do not support memory ing. Therefore, configuration mechanism #1 is the only option to access the PCI configuration space.
The RW software can read the mcfg base address:
Figure 1
At the same time, we can also see the value of b0d2f0's register:
Figure 2 then, based on the base address f8000000 and b0d2f0, according to The PCIe cofigration space address specification, we can get the address f8010000. We can read it through Dumphys to change the physical address value:
The value read in Figure 3 is 07 04 90 00, which corresponds to the data in figure 2.
Access to PCI and PCIe configuration space (mcfg, bus, device, Funtion)
