Ack and nack of I2C signal

ack and nack of I2C signal

We usually in debugging I2C may rarely pay attention to the nack signal, only know if the master send data, MSB first, LSB after sending a byte (8 bit), then Slave will reply to an ACK signal, but sometimes I2C Slave may send a nack signal, let's take a look at the nack signal.

1, from the spec under a paragraph:

2. Translation:

Each byte is followed by an ACK signal. The ACK bit enables the recipient to notify the sender that the data has been successfully received and ready to receive the next data. All clock pulses including the ACK signal correspond to the clock pulses are generated by master.

ACK signal: The sender releases the SDA line during the ACK clock pulse, and the receiver can pull the SDA down and keep the low level when the clock signal is high.

Nack signal: When the 9th clock pulse in the SDA line to maintain a high level, it is defined as the nack signal. Master either produces a stop condition to abandon the transmission, or repeats the start condition to initiate a new start.

3. Example:

Can see the following waveform, Master sent 01101100 (0X6C,MSB), in the 9th clock when SDA for high level, said slave sent Nack signal, after the entire I2C communication is over. This is a failed I2C communication, possibly due to a problem with the I2C device, or the address of the Access I2C device does not correspond to the actual address of the I2C device, resulting in the failure to receive master's data and return to Nack.

Let me take a OV8825 sensor I2C to illustrate that

OV8825 's slave Write address is 0x6c,ov8825 's ID register address for the 0x300a,0x300b,id register, where the value stored is 0x88,0x25

The normal I2C waveform is as follows:

1 Set I2C write address: 01101100 (0x6c) 00110000 (0x30) 00001010 (0x0a)

Slave Write Address:0x6c,id Register address:0x300a

2 Set I2C read address: 01101101 (0x6d) 10001000 (0x88) Slave read Address:0x6d,id register value:0x88

20150716 It's a little strange to see here, I2C write ends the communication in Ack+stop, and I2C read ends the communication with Nack+stop for the following reasons:

When I2C write, Master returns an ACK after the last byte is written, and master sends the stop signal to end the communication slave

When I2C read, Master returns to the Nak after receiving the last byte sent by slave, because master has received enough bytes, and Nak tells slave not to send the data.

3 Set I2C address: 01101100 (0x6c) 00110000 (0x30) 00001011 (0x0b) Slave write Address:0x6c,id register address:0x300b

4 Set I2C read address: 01101101 (0x6d) 00100101 (0x25) Slave read Address:0x6d,id register value:0x25